zephyr: sof: update board name for HWMv2

app/CMakeLists.txt

@@ -1,6 +1,6 @@
 # SPDX-License-Identifier: Apache-2.0
 
-cmake_minimum_required(VERSION 3.21.0)
+cmake_minimum_required(VERSION 3.20.0)
 
 find_package(Zephyr HINTS $ENV{ZEPHYR_BASE})
 project(sample_sof)

app/sample.yaml

@@ -11,14 +11,19 @@ tests:
     tags: sof
     build_only: true
     platform_allow:
-      intel_adsp_cavs25 intel_adsp_ace15_mtpm intel_adsp_ace20_lnl
-      nxp_adsp_imx8 nxp_adsp_imx8x nxp_adsp_imx8m
+      - intel_adsp_cavs25
+      - intel_adsp_ace15_mtpm
+      - intel_adsp_ace20_lnl
+      - imx8qm_mek/mimx8qm6/adsp
+      - imx8qxp_mek/mimx8qx6/adsp
+      - imx8mp_evk/mimx8ml8/adsp
+      - imx8ulp_evk/imx8ulp/adsp
 
     integration_platforms:
       - intel_adsp_cavs25  # TGL
       - intel_adsp_ace15_mtpm  # MTL
       - intel_adsp_ace20_lnl
-      - nxp_adsp_imx8
-      - nxp_adsp_imx8x
-      - nxp_adsp_imx8m
-      - nxp_adsp_imx8ulp
+      - imx8qm_mek/mimx8qm6/adsp
+      - imx8qxp_mek/mimx8qx6/adsp
+      - imx8mp_evk/mimx8ml8/adsp
+      - imx8ulp_evk/imx8ulp/adsp

scripts/xtensa-build-zephyr.py

@@ -121,25 +121,25 @@ class PlatformConfig:
 
 	#  NXP platforms
 	"imx8" : PlatformConfig(
-		"imx", "nxp_adsp_imx8",
+		"imx", "imx8qm_mek/mimx8qm6/adsp",
 		f"RI-2023.11{xtensa_tools_version_postfix}",
 		"hifi4_nxp_v5_3_1_prod",
 		RIMAGE_KEY = "key param ignored by imx8",
 	),
 	"imx8x" : PlatformConfig(
-		"imx", "nxp_adsp_imx8x",
+		"imx", "imx8qxp_mek/mimx8qx6/adsp",
 		f"RI-2023.11{xtensa_tools_version_postfix}",
 		"hifi4_nxp_v5_3_1_prod",
 		RIMAGE_KEY = "key param ignored by imx8x"
 	),
 	"imx8m" : PlatformConfig(
-		"imx", "nxp_adsp_imx8m",
+		"imx", "imx8mp_evk/mimx8ml8/adsp",
 		f"RI-2023.11{xtensa_tools_version_postfix}",
 		"hifi4_mscale_v2_0_2_prod",
 		RIMAGE_KEY = "key param ignored by imx8m"
 	),
 	"imx8ulp" : PlatformConfig(
-		"imx", "nxp_adsp_imx8ulp",
+		"imx", "imx8ulp_evk/imx8ulp/adsp",
 		f"RI-2023.11{xtensa_tools_version_postfix}",
 		"hifi4_nxp2_s7_v2_1a_prod",
 		RIMAGE_KEY = "key param ignored by imx8ulp"

zephyr/CMakeLists.txt

@@ -232,7 +232,7 @@ if (CONFIG_SOC_SERIES_INTEL_ACE)
 endif()
 
 # NXP IMX8 platforms
-if (CONFIG_SOC_SERIES_NXP_IMX8)
+if (CONFIG_SOC_MIMX8QM_ADSP OR CONFIG_SOC_MIMX8QXP_ADSP)
 	zephyr_library_sources(
 		${SOF_DRIVERS_PATH}/generic/dummy-dma.c
 		${SOF_DRIVERS_PATH}/imx/edma.c
@@ -261,7 +261,7 @@ if (CONFIG_SOC_SERIES_NXP_IMX8)
 	set(PLATFORM "imx8")
 endif()
 
-if (CONFIG_SOC_SERIES_NXP_IMX8M)
+if (CONFIG_SOC_MIMX8MP_ADSP)
 	zephyr_library_sources(
 		${SOF_DRIVERS_PATH}/generic/dummy-dma.c
 		${SOF_DRIVERS_PATH}/imx/sdma.c
@@ -290,7 +290,7 @@ if (CONFIG_SOC_SERIES_NXP_IMX8M)
 	set(PLATFORM "imx8m")
 endif()
 
-if (CONFIG_SOC_SERIES_NXP_IMX8ULP)
+if (CONFIG_SOC_MIMX8ULP_ADSP)
 	zephyr_library_sources(
 		${SOF_DRIVERS_PATH}/generic/dummy-dma.c
 		${SOF_DRIVERS_PATH}/imx/edma.c

zephyr/lib/alloc.c

@@ -116,7 +116,7 @@ static inline uintptr_t get_l3_heap_start(void)
 	 * - main_fw_load_offset
 	 * - main fw size in manifest
 	 */
-	return (uintptr_t)z_soc_uncached_ptr((__sparse_force void __sparse_cache *)
+	return (uintptr_t)sys_cache_uncached_ptr_get((__sparse_force void __sparse_cache *)
 					     ROUND_UP(IMR_L3_HEAP_BASE, L3_MEM_PAGE_SIZE));
 }
 
@@ -146,7 +146,7 @@ static bool is_l3_heap_pointer(void *ptr)
 	uintptr_t l3_heap_end = l3_heap_start + get_l3_heap_size();
 
 	if (is_cached(ptr))
-		ptr = z_soc_uncached_ptr((__sparse_force void __sparse_cache *)ptr);
+		ptr = sys_cache_uncached_ptr_get((__sparse_force void __sparse_cache *)ptr);
 
 	if ((POINTER_TO_UINT(ptr) >= l3_heap_start) && (POINTER_TO_UINT(ptr) < l3_heap_end))
 		return true;
@@ -199,7 +199,7 @@ static void __sparse_cache *heap_alloc_aligned_cached(struct k_heap *h,
 
 #ifdef CONFIG_SOF_ZEPHYR_HEAP_CACHED
 	if (ptr)
-		ptr = z_soc_cached_ptr((__sparse_force void *)ptr);
+		ptr = sys_cache_cached_ptr_get((__sparse_force void *)ptr);
 #endif
 
 	return ptr;
@@ -212,7 +212,7 @@ static void heap_free(struct k_heap *h, void *mem)
 	void *mem_uncached;
 
 	if (is_cached(mem)) {
-		mem_uncached = z_soc_uncached_ptr((__sparse_force void __sparse_cache *)mem);
+		mem_uncached = sys_cache_uncached_ptr_get((__sparse_force void __sparse_cache *)mem);
 		sys_cache_data_flush_and_invd_range(mem,
 				sys_heap_usable_size(&h->heap, mem_uncached));
 

zephyr/lib/cpu.c

@@ -19,6 +19,7 @@
 /* Zephyr includes */
 #include <version.h>
 #include <zephyr/kernel.h>
+#include <zephyr/kernel/smp.h>
 #include <zephyr/device.h>
 #include <zephyr/drivers/mm/mm_drv_intel_adsp_mtl_tlb.h>
 
@@ -27,37 +28,13 @@
 extern K_KERNEL_STACK_ARRAY_DEFINE(z_interrupt_stacks, CONFIG_MP_MAX_NUM_CPUS,
 				   CONFIG_ISR_STACK_SIZE);
 
-static atomic_t start_flag;
 static atomic_t ready_flag;
 
-/* Zephyr kernel_internal.h interface */
-extern void smp_timer_init(void);
-
-static FUNC_NORETURN void secondary_init(void *arg)
+static void secondary_init(void *arg)
 {
-	struct k_thread dummy_thread;
-
-	/*
-	 * This is an open-coded version of zephyr/kernel/smp.c
-	 * smp_init_top(). We do this so that we can call SOF
-	 * secondary_core_init() for each core.
-	 */
-
 	atomic_set(&ready_flag, 1);
-	z_smp_thread_init(arg, &dummy_thread);
-	smp_timer_init();
 
 	secondary_core_init(sof_get());
-
-#ifdef CONFIG_THREAD_STACK_INFO
-	dummy_thread.stack_info.start = (uintptr_t)z_interrupt_stacks +
-		arch_curr_cpu()->id * Z_KERNEL_STACK_LEN(CONFIG_ISR_STACK_SIZE);
-	dummy_thread.stack_info.size = Z_KERNEL_STACK_LEN(CONFIG_ISR_STACK_SIZE);
-#endif
-
-	z_smp_thread_swap();
-
-	CODE_UNREACHABLE; /* LCOV_EXCL_LINE */
 }
 
 #if CONFIG_ZEPHYR_NATIVE_DRIVERS
@@ -131,13 +108,10 @@ void cpu_notify_state_exit(enum pm_state state)
 
 int cpu_enable_core(int id)
 {
+	bool cpu_resume = true;
+
 	/* only called from single core, no RMW lock */
 	__ASSERT_NO_MSG(cpu_is_primary(arch_proc_id()));
-	/*
-	 * This is an open-coded version of zephyr/kernel/smp.c
-	 * z_smp_start_cpu(). We do this, so we can use a customized
-	 * secondary_init() for SOF.
-	 */
 
 	if (arch_cpu_active(id))
 		return 0;
@@ -149,20 +123,19 @@ int cpu_enable_core(int id)
 	 * and the idle thread stack.
 	 */
 	if (pm_state_next_get(id)->state == PM_STATE_ACTIVE)
-		z_init_cpu(id);
+		cpu_resume = false;
 #endif
 
-	atomic_clear(&start_flag);
 	atomic_clear(&ready_flag);
 
-	arch_start_cpu(id, z_interrupt_stacks[id], CONFIG_ISR_STACK_SIZE,
-		       secondary_init, &start_flag);
+	if (cpu_resume)
+		k_smp_cpu_resume(id, secondary_init, NULL, true, false);
+	else
+		k_smp_cpu_start(id, secondary_init, NULL);
 
 	while (!atomic_get(&ready_flag))
 		k_busy_wait(100);
 
-	atomic_set(&start_flag, 1);
-
 	return 0;
 }
 
@@ -248,21 +221,13 @@ int cpu_enable_secondary_core(int id)
 	if (arch_cpu_active(id))
 		return 0;
 
-#if ZEPHYR_VERSION(3, 0, 99) <= ZEPHYR_VERSION_CODE
-	z_init_cpu(id);
-#endif
-
-	atomic_clear(&start_flag);
 	atomic_clear(&ready_flag);
 
-	arch_start_cpu(id, z_interrupt_stacks[id], CONFIG_ISR_STACK_SIZE,
-		       secondary_init, &start_flag);
+	k_smp_cpu_start(id, secondary_init, NULL);
 
 	while (!atomic_get(&ready_flag))
 		k_busy_wait(100);
 
-	atomic_set(&start_flag, 1);
-
 	return 0;
 }