dts: arm: renesas: Add Flash HP support for Renesas RA6, RA4

- Add Flash HP support for ra6-cm4, ra6-cm33, ra4-cm33 (except r7fa4w1ad2cng) - Add config to set the minimal size of data which can be written for RA4E2, RA4M2, RA4M3, RA6E1, RA6E2, RA6M1, RA6M2, RA6M3, RA6M4, RA6M5 Signed-off-by: Khoa Nguyen <[email protected]> Signed-off-by: Phi Tran <[email protected]>
zephyrproject-rtos · Jan 8, 2025 · e20e0c8 · e20e0c8
1 parent c667536
commit e20e0c8
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Showing 23 changed files with 199 additions and 49 deletions.
diff --git a/dts/arm/renesas/ra/ra4/r7fa4e2b93cfm.dtsi b/dts/arm/renesas/ra/ra4/r7fa4e2b93cfm.dtsi
@@ -36,12 +36,21 @@
 		};
 
 		flash-controller@407e0000 {
-			reg = <0x407e0000 0x10000>;
-			#address-cells = <1>;
-			#size-cells = <1>;
+			block-32kb-linear-end = <9>;
 			flash0: flash@0 {
-				compatible = "soc-nv-flash";
+				compatible = "renesas,ra-nv-flash";
 				reg = <0x0 DT_SIZE_K(128)>;
+				write-block-size = <128>;
+				erase-block-size = <8192>;
+				renesas,programming-enable;
+			};
+
+			flash1: flash@8000000 {
+				compatible = "renesas,ra-nv-flash";
+				reg = <0x8000000 DT_SIZE_K(4)>;
+				write-block-size = <4>;
+				erase-block-size = <64>;
+				renesas,programming-enable;
 			};
 		};
 

diff --git a/dts/arm/renesas/ra/ra4/r7fa4m2ad3cfp.dtsi b/dts/arm/renesas/ra/ra4/r7fa4m2ad3cfp.dtsi
@@ -10,12 +10,21 @@
 / {
 	soc {
 		flash-controller@407e0000 {
-			reg = <0x407e0000 0x1000>;
-			#address-cells = <1>;
-			#size-cells = <1>;
+			block-32kb-linear-end = <21>;
 			flash0: flash@0 {
-				compatible = "soc-nv-flash";
+				compatible = "renesas,ra-nv-flash";
 				reg = <0x0 DT_SIZE_K(512)>;
+				write-block-size = <128>;
+				erase-block-size = <8192>;
+				renesas,programming-enable;
+			};
+
+			flash1: flash@8000000 {
+				compatible = "renesas,ra-nv-flash";
+				reg = <0x8000000 DT_SIZE_K(8)>;
+				write-block-size = <4>;
+				erase-block-size = <64>;
+				renesas,programming-enable;
 			};
 		};
 	};

diff --git a/dts/arm/renesas/ra/ra4/r7fa4m3af3cfb.dtsi b/dts/arm/renesas/ra/ra4/r7fa4m3af3cfb.dtsi
@@ -10,12 +10,21 @@
 / {
 	soc {
 		flash-controller@407e0000 {
-			reg = <0x407e0000 0x1000>;
-			#address-cells = <1>;
-			#size-cells = <1>;
+			block-32kb-linear-end = <37>;
 			flash0: flash@0 {
-				compatible = "soc-nv-flash";
+				compatible = "renesas,ra-nv-flash";
 				reg = <0x0 DT_SIZE_M(1)>;
+				write-block-size = <128>;
+				erase-block-size = <8192>;
+				renesas,programming-enable;
+			};
+
+			flash1: flash@8000000 {
+				compatible = "renesas,ra-nv-flash";
+				reg = <0x8000000 DT_SIZE_K(8)>;
+				write-block-size = <4>;
+				erase-block-size = <64>;
+				renesas,programming-enable;
 			};
 		};
 	};

diff --git a/dts/arm/renesas/ra/ra4/ra4-cm33-common.dtsi b/dts/arm/renesas/ra/ra4/ra4-cm33-common.dtsi
@@ -38,10 +38,13 @@
 			status = "okay";
 		};
 
-		flash-controller@407e0000 {
+		flash: flash-controller@407e0000 {
+			compatible = "renesas,ra-flash-hp-controller";
 			reg = <0x407e0000 0x10000>;
 			#address-cells = <1>;
 			#size-cells = <1>;
+			interrupts = <49 1>, <50 1>;
+			interrupt-names = "frdyi", "fiferr";
 		};
 
 		ioport0: gpio@40080000 {

diff --git a/dts/arm/renesas/ra/ra6/r7fa6e10f2cfp.dtsi b/dts/arm/renesas/ra/ra6/r7fa6e10f2cfp.dtsi
@@ -9,13 +9,24 @@
 / {
 	soc {
 		flash-controller@407e0000 {
-			reg = <0x407e0000 0x1000>;
-			#address-cells = <1>;
-			#size-cells = <1>;
-
+			reserved-area-num = <48>;
+			block-32kb-linear-end = <37>;
+			block-32kb-dual-low-end = <21>;
+			block-32kb-dual-high-end = <91>;
 			flash0: flash@0 {
-				compatible = "soc-nv-flash";
+				compatible = "renesas,ra-nv-flash";
 				reg = <0x0 DT_SIZE_M(1)>;
+				write-block-size = <128>;
+				erase-block-size = <8192>;
+				renesas,programming-enable;
+			};
+
+			flash1: flash@8000000 {
+				compatible = "renesas,ra-nv-flash";
+				reg = <0x8000000 DT_SIZE_K(8)>;
+				write-block-size = <4>;
+				erase-block-size = <64>;
+				renesas,programming-enable;
 			};
 		};
 	};

diff --git a/dts/arm/renesas/ra/ra6/r7fa6e2bb3cfm.dtsi b/dts/arm/renesas/ra/ra6/r7fa6e2bb3cfm.dtsi
@@ -9,13 +9,21 @@
 / {
 	soc {
 		flash-controller@407e0000 {
-			reg = <0x407e0000 0x10000>;
-			#address-cells = <1>;
-			#size-cells = <1>;
-
+			block-32kb-linear-end = <13>;
 			flash0: flash@0 {
-				compatible = "soc-nv-flash";
+				compatible = "renesas,ra-nv-flash";
 				reg = <0x0 DT_SIZE_K(256)>;
+				write-block-size = <128>;
+				erase-block-size = <8192>;
+				renesas,programming-enable;
+			};
+
+			flash1: flash@8000000 {
+				compatible = "renesas,ra-nv-flash";
+				reg = <0x8000000 DT_SIZE_K(4)>;
+				write-block-size = <4>;
+				erase-block-size = <64>;
+				renesas,programming-enable;
 			};
 		};
 	};

diff --git a/dts/arm/renesas/ra/ra6/r7fa6m1ad3cfp.dtsi b/dts/arm/renesas/ra/ra6/r7fa6m1ad3cfp.dtsi
@@ -15,13 +15,21 @@
 		};
 
 		flash-controller@407e0000 {
-			reg = <0x407e0000 0x1000>;
-			#address-cells = <1>;
-			#size-cells = <1>;
-
+			block-32kb-linear-end = <21>;
 			flash0: flash@0 {
-				compatible = "soc-nv-flash";
+				compatible = "renesas,ra-nv-flash";
 				reg = <0x0 DT_SIZE_K(512)>;
+				write-block-size = <128>;
+				erase-block-size = <8192>;
+				renesas,programming-enable;
+			};
+
+			flash1: flash@40100000 {
+				compatible = "renesas,ra-nv-flash";
+				reg = <0x40100000 DT_SIZE_K(8)>;
+				write-block-size = <4>;
+				erase-block-size = <64>;
+				renesas,programming-enable;
 			};
 		};
 

diff --git a/dts/arm/renesas/ra/ra6/r7fa6m2af3cfb.dtsi b/dts/arm/renesas/ra/ra6/r7fa6m2af3cfb.dtsi
@@ -9,18 +9,21 @@
 / {
 	soc {
 		flash-controller@407e0000 {
-			compatible = "renesas,ra6-flash-controller";
-			reg = <0x407e0000 0x10000>;
-			#address-cells = <1>;
-			#size-cells = <1>;
-			interrupts = <4 1>, <5 1>;
-			interrupt-names = "frdyi", "fiferr";
-
+			block-32kb-linear-end = <37>;
 			flash0: flash@0 {
-				compatible = "soc-nv-flash";
+				compatible = "renesas,ra-nv-flash";
 				reg = <0x0 DT_SIZE_M(1)>;
 				write-block-size = <128>;
 				erase-block-size = <8192>;
+				renesas,programming-enable;
+			};
+
+			flash1: flash@40100000 {
+				compatible = "renesas,ra-nv-flash";
+				reg = <0x40100000 DT_SIZE_K(32)>;
+				write-block-size = <4>;
+				erase-block-size = <64>;
+				renesas,programming-enable;
 			};
 		};
 

diff --git a/dts/arm/renesas/ra/ra6/r7fa6m3ah3cfc.dtsi b/dts/arm/renesas/ra/ra6/r7fa6m3ah3cfc.dtsi
@@ -9,12 +9,21 @@
 / {
 	soc {
 		flash-controller@407e0000 {
-			reg = <0x407e0000 0x1000>;
-			#address-cells = <1>;
-			#size-cells = <1>;
+			block-32kb-linear-end = <69>;
 			flash0: flash@0 {
-				compatible = "soc-nv-flash";
+				compatible = "renesas,ra-nv-flash";
 				reg = <0x0 DT_SIZE_M(2)>;
+				write-block-size = <128>;
+				erase-block-size = <8192>;
+				renesas,programming-enable;
+			};
+
+			flash1: flash@40100000 {
+				compatible = "renesas,ra-nv-flash";
+				reg = <0x40100000 DT_SIZE_K(64)>;
+				write-block-size = <4>;
+				erase-block-size = <64>;
+				renesas,programming-enable;
 			};
 		};
 

diff --git a/dts/arm/renesas/ra/ra6/r7fa6m4af3cfb.dtsi b/dts/arm/renesas/ra/ra6/r7fa6m4af3cfb.dtsi
@@ -9,13 +9,24 @@
 / {
 	soc {
 		flash-controller@407e0000 {
-			reg = <0x407e0000 0x10000>;
-			#address-cells = <1>;
-			#size-cells = <1>;
-
+			reserved-area-num = <48>;
+			block-32kb-linear-end = <37>;
+			block-32kb-dual-low-end = <21>;
+			block-32kb-dual-high-end = <91>;
 			flash0: flash@0 {
-				compatible = "soc-nv-flash";
+				compatible = "renesas,ra-nv-flash";
 				reg = <0x0 DT_SIZE_M(1)>;
+				write-block-size = <128>;
+				erase-block-size = <8192>;
+				renesas,programming-enable;
+			};
+
+			flash1: flash@8000000 {
+				compatible = "renesas,ra-nv-flash";
+				reg = <0x8000000 DT_SIZE_K(8)>;
+				write-block-size = <4>;
+				erase-block-size = <64>;
+				renesas,programming-enable;
 			};
 		};
 	};

diff --git a/dts/arm/renesas/ra/ra6/r7fa6m5bh3cfc.dtsi b/dts/arm/renesas/ra/ra6/r7fa6m5bh3cfc.dtsi
@@ -9,12 +9,24 @@
 / {
 	soc {
 		flash-controller@407e0000 {
-			reg = <0x407e0000 0x1000>;
-			#address-cells = <1>;
-			#size-cells = <1>;
+			reserved-area-num = <32>;
+			block-32kb-linear-end = <69>;
+			block-32kb-dual-low-end = <37>;
+			block-32kb-dual-high-end = <107>;
 			flash0: flash@0 {
-				compatible = "soc-nv-flash";
+				compatible = "renesas,ra-nv-flash";
 				reg = <0x0 DT_SIZE_M(2)>;
+				write-block-size = <128>;
+				erase-block-size = <8192>;
+				renesas,programming-enable;
+			};
+
+			flash1: flash@8000000 {
+				compatible = "renesas,ra-nv-flash";
+				reg = <0x8000000 DT_SIZE_K(8)>;
+				write-block-size = <4>;
+				erase-block-size = <64>;
+				renesas,programming-enable;
 			};
 		};
 	};

diff --git a/dts/arm/renesas/ra/ra6/ra6-cm33-common.dtsi b/dts/arm/renesas/ra/ra6/ra6-cm33-common.dtsi
@@ -286,6 +286,15 @@
 			status = "okay";
 		};
 
+		flash: flash-controller@407e0000 {
+			compatible = "renesas,ra-flash-hp-controller";
+			reg = <0x407e0000 0x10000>;
+			#address-cells = <1>;
+			#size-cells = <1>;
+			interrupts = <49 1>, <50 1>;
+			interrupt-names = "frdyi", "fiferr";
+		};
+
 		option_setting_sas: option_setting_sas@100a134 {
 			compatible = "zephyr,memory-region";
 			reg = <0x0100a134 0xcc>;

diff --git a/dts/arm/renesas/ra/ra6/ra6-cm4-common.dtsi b/dts/arm/renesas/ra/ra6/ra6-cm4-common.dtsi
@@ -588,6 +588,15 @@
 			#pwm-cells = <3>;
 			status = "disabled";
 		};
+
+		flash: flash-controller@407e0000 {
+			compatible = "renesas,ra-flash-hp-controller";
+			reg = <0x407e0000 0x10000>;
+			#address-cells = <1>;
+			#size-cells = <1>;
+			interrupts = <49 1>, <50 1>;
+			interrupt-names = "frdyi", "fiferr";
+		};
 	};
 };
 

diff --git a/soc/renesas/ra/ra4e2/Kconfig.defconfig b/soc/renesas/ra/ra4e2/Kconfig.defconfig
@@ -6,4 +6,8 @@ if SOC_SERIES_RA4E2
 config NUM_IRQS
 	default 96
 
+# Set to the minimal size of data which can be written.
+config FLASH_FILL_BUFFER_SIZE
+	default 128
+
 endif # SOC_SERIES_RA4E2
diff --git a/soc/renesas/ra/ra4m2/Kconfig.defconfig b/soc/renesas/ra/ra4m2/Kconfig.defconfig
@@ -6,4 +6,8 @@ if SOC_SERIES_RA4M2
 config NUM_IRQS
 	default 96
 
+# Set to the minimal size of data which can be written.
+config FLASH_FILL_BUFFER_SIZE
+	default 128
+
 endif # SOC_SERIES_RA4M2
diff --git a/soc/renesas/ra/ra4m3/Kconfig.defconfig b/soc/renesas/ra/ra4m3/Kconfig.defconfig
@@ -6,4 +6,8 @@ if SOC_SERIES_RA4M3
 config NUM_IRQS
 	default 96
 
+# Set to the minimal size of data which can be written.
+config FLASH_FILL_BUFFER_SIZE
+	default 128
+
 endif # SOC_SERIES_RA4M3
diff --git a/soc/renesas/ra/ra6e1/Kconfig.defconfig b/soc/renesas/ra/ra6e1/Kconfig.defconfig
@@ -6,4 +6,8 @@ if SOC_SERIES_RA6E1
 config NUM_IRQS
 	default 96
 
+# Set to the minimal size of data which can be written.
+config FLASH_FILL_BUFFER_SIZE
+	default 128
+
 endif # SOC_SERIES_RA6E1
diff --git a/soc/renesas/ra/ra6e2/Kconfig.defconfig b/soc/renesas/ra/ra6e2/Kconfig.defconfig
@@ -6,4 +6,8 @@ if SOC_SERIES_RA6E2
 config NUM_IRQS
 	default 96
 
+# Set to the minimal size of data which can be written.
+config FLASH_FILL_BUFFER_SIZE
+	default 128
+
 endif # SOC_SERIES_RA6E2
diff --git a/soc/renesas/ra/ra6m1/Kconfig.defconfig b/soc/renesas/ra/ra6m1/Kconfig.defconfig
@@ -6,4 +6,8 @@ if SOC_SERIES_RA6M1
 config NUM_IRQS
 	default 96
 
+# Set to the minimal size of data which can be written.
+config FLASH_FILL_BUFFER_SIZE
+	default 128
+
 endif # SOC_SERIES_RA6M1
diff --git a/soc/renesas/ra/ra6m2/Kconfig.defconfig b/soc/renesas/ra/ra6m2/Kconfig.defconfig
@@ -6,4 +6,8 @@ if SOC_SERIES_RA6M2
 config NUM_IRQS
 	default 96
 
+# Set to the minimal size of data which can be written.
+config FLASH_FILL_BUFFER_SIZE
+	default 128
+
 endif # SOC_SERIES_RA6M2
diff --git a/soc/renesas/ra/ra6m3/Kconfig.defconfig b/soc/renesas/ra/ra6m3/Kconfig.defconfig
@@ -6,4 +6,8 @@ if SOC_SERIES_RA6M3
 config NUM_IRQS
 	default 96
 
+# Set to the minimal size of data which can be written.
+config FLASH_FILL_BUFFER_SIZE
+	default 128
+
 endif # SOC_SERIES_RA6M3