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drivers: clock_control: Agilex5 clock control driver updates #78142

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merged 2 commits into from
Dec 16, 2024

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@gdengi gdengi commented Sep 9, 2024

The Agilex5 clock controller/manager IP registers are updated with the correct divider values by bootloader via hand-off
data, so now we can use the clock controller to get the clock value of each peripheral during run time.

As an example and test, remove hard-coded clock values from device tree nodes of UART and TIMER, and instead
read the clock values from the clock controller during run time.

The clock controller/manager registers are updated with
the correct divider values by bootloader via hand-off
data, so now we can use the clock controller to get the
clock value of each peripheral during the run time.

Signed-off-by: Girisha Dengi <[email protected]>
Remove hard-coded clock values from device tree nodes,
instead read the clock values from the clock controller
during run time.

Signed-off-by: Girisha Dengi <[email protected]>
@gdengi gdengi force-pushed the agilex5_clock_control branch from fa37b17 to fcc934d Compare September 9, 2024 08:22
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gdengi commented Sep 10, 2024

@nordic-krch @carlocaione Kindly review this PR and let me know your feedback. Thank you.

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gdengi commented Oct 15, 2024

Dear @nordic-krch, kindly review this PR whenever you are available and provide your feedback for the same. Thank you.

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gdengi commented Oct 16, 2024

Dear @carlocaione, Kindly review this PR whenever you are available and provide your feedback for the same. Thank you.

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gdengi commented Oct 29, 2024

Dear @SgrrZhf, @povergoing, @carlocaione, @npitre, kindly review this PR and let me know your comments. Thank you.

@gdengi gdengi added dev-review To be discussed in dev-review meeting and removed dev-review To be discussed in dev-review meeting labels Nov 25, 2024
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gdengi commented Nov 25, 2024

Hello @carlocaione , @npitre , @povergoing , @SgrrZhf ,

Kindly review this PR and let me know your feedback. Thank you.

@nashif nashif merged commit fbdf6e3 into zephyrproject-rtos:main Dec 16, 2024
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area: ARM64 ARM (64-bit) Architecture area: Clock Control platform: Intel SoC FPGA Agilex Intel Corporation, SoC FPGA Agilex
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4 participants