subsys: ipc: icbmsg: Reduce block alignment to 32-bits #79604
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The ICBMsg backend divides its memory into blocks. Each block is aligned to data cache alignment. Is it not required, since adjacent blocks has the same data flow direction (either read-only or write-only). This commit changes it to 32-bits making wasted memory significantly reduced. Upstream PR: zephyrproject-rtos/zephyr#79604 Signed-off-by: Dominik Kilian <[email protected]>
The ICBMsg backend divides its memory into blocks. Each block is aligned to data cache alignment. Is it not required, since adjacent blocks has the same data flow direction (either read-only or write-only). This commit changes it to 32-bits making wasted memory significantly reduced. Signed-off-by: Dominik Kilian <[email protected]>
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The ICBMsg backend divides its memory into blocks. Each block is aligned to data cache alignment. Is it not required, since adjacent blocks has the same data flow direction (either read-only or write-only). This commit changes it to 32-bits making wasted memory significantly reduced.