drivers: i2c_dw: add devicetree property to offset clock settings #80181
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The actual clock speed of the bus is partially determined by the rising/falling edges of the SCL. These settings allow applications to tune the clock based on board characteristics. Signed-off-by: Corey Wharton <[email protected]>
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nashif
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Dec 16, 2024
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The actual clock speed of the bus is partially determined by the rising/falling edges of the SCL. These settings allow applications to tune the clock based on board characteristics.