-
Notifications
You must be signed in to change notification settings - Fork 6.7k
New issue
Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.
By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.
Already on GitHub? Sign in to your account
dts: arm: st: Fix memory mapping and size for STM32L47x/8x/9x/ax #81286
Merged
Conversation
This file contains bidirectional Unicode text that may be interpreted or compiled differently than what appears below. To review, open the file in an editor that reveals hidden Unicode characters.
Learn more about bidirectional Unicode characters
Split and fix the total SRAM size for STM32L47x/L48x/L49x/L4Ax device. Those MCUs with up to 320 Kbytes SRAM: • 96 Kbytes SRAM1 and 32 Kbyte SRAM2 on STM32L47x/L48x. • 256 Kbyte SRAM1 and 64 Kbyte SRAM2 on STM32L49x/L4Ax The sram0 node at address 0x20000000 and sram1 at address 0x10000000 Signed-off-by: Francois Ramu <[email protected]>
zephyrbot
requested review from
erwango,
gautierg-st,
GeorgeCGV,
marwaiehm-st and
mathieuchopstm
November 13, 2024 08:07
Align the total SRAM size for STM32L47x/L48x/L49x/L4Ax boards. Those MCUs with up to 320 Kbytes SRAM: • 96 Kbytes SRAM1 and 32 Kbyte SRAM2 on STM32L47x/L48x. • 256 Kbyte SRAM1 and 64 Kbyte SRAM2 on STM32L49x/L4Ax Signed-off-by: Francois Ramu <[email protected]>
erwango
previously approved these changes
Nov 13, 2024
Adding the definition for the stm32L4plus devices
Note that SRAM3 address differs from 0x2003000 on stm32L4P5x/L4Q5x and 0x2004000 on stm32L4R5x/L4S5x |
erwango
previously approved these changes
Nov 13, 2024
Split and fix the total SRAM size for STM32L4Px/L4Qx/L4Rx/L4Sx device. Those MCUs with up to 640 Kbytes SRAM: This is 640KB for the STM32L4Rxxx and STM32L4Sxxx devices : • 192 Kbytes SRAM1 + 64 Kbytes SRAM2 + 384 Kbytes SRAM3 This is 320KB for the STM32L4P5xx and STM32L4Q5xx devices : • 128 Kbytes SRAM1 + 64 Kbytes SRAM2 + 128 Kbytes SRAM3 Signed-off-by: Francois Ramu <[email protected]>
Align the total SRAM size for STM32L47x/L48x/L49x/L4Ax boards. Those MCUs with up to 320 Kbytes SRAM: Signed-off-by: Francois Ramu <[email protected]>
erwango
approved these changes
Nov 19, 2024
gautierg-st
approved these changes
Nov 22, 2024
Sign up for free
to join this conversation on GitHub.
Already have an account?
Sign in to comment
Add this suggestion to a batch that can be applied as a single commit.
This suggestion is invalid because no changes were made to the code.
Suggestions cannot be applied while the pull request is closed.
Suggestions cannot be applied while viewing a subset of changes.
Only one suggestion per line can be applied in a batch.
Add this suggestion to a batch that can be applied as a single commit.
Applying suggestions on deleted lines is not supported.
You must change the existing code in this line in order to create a valid suggestion.
Outdated suggestions cannot be applied.
This suggestion has been applied or marked resolved.
Suggestions cannot be applied from pending reviews.
Suggestions cannot be applied on multi-line comments.
Suggestions cannot be applied while the pull request is queued to merge.
Suggestion cannot be applied right now. Please check back later.
Split and fix the total SRAM size for STM32L47x/L48x/L49x/L4Ax devices.
Those MCUs with up to 320 Kbytes SRAM:
• 96 Kbytes SRAM1 and 32 Kbyte SRAM2 on STM32L47x/L48x.
• 256 Kbyte SRAM1 and 64 Kbyte SRAM2 on STM32L49x/L4Ax devices
The sram0 node at address 0x20000000 and sram1 at address 0x10000000
Fixes #79607
This PR extends what was done by #71456