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drivers: pinctrl: silabs: Add pinctrl driver for digital bus #81865
drivers: pinctrl: silabs: Add pinctrl driver for digital bus #81865
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I don't fully understand the scancode failure. Is it triggering on the presence of "CC0" in the files (meaning "compare/capture channel 0", not "creative commons")? |
out { | ||
pins = <USART0_TX_PC0>, <USART0_CLK_PC2>; | ||
drive-push-pull; | ||
output-high; | ||
}; | ||
in { |
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nit: use group1
, group2
?
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Done
The license check is getting confused by lines such as #define TIMER0_CC0_PB0 SILABS_DBUS_TIMER0_CC0(1, 0) the ideally we'd fix the script but I don't think it's worth the hassle since the whole purpose of the file is to define those as macros and on future code (the check kicks in on an new file) the code would use |
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Only cosmetics comments.
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Nice documentation
#define SILABS_PINCTRL_PERIPH_BASE_MASK 0x3FF00UL | ||
#define SILABS_PINCTRL_HAVE_EN_MASK 0x40000UL | ||
#define SILABS_PINCTRL_EN_BIT_MASK 0xF80000UL | ||
#define SILABS_PINCTRL_ROUTE_MASK 0x1F000000UL |
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Maybe we should add the prefix zeros. Thus, the masks are properly aligned.
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Done
soc/silabs/common/pinctrl_soc.h
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Do you have a plan to split series 0/1 and series 2 in two files? Maybe silabs_s2/pinctrl_soc.h
could include common/pinctrl_soc_dbus.h
and silabs_s[01]/pinctrl_soc.h
could include common/pinctrl_soc.h
(ditto for soc_gpio.h
)? That's said, this can be addressed later.
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Agree that we should take a holistic look at the common/ directory now that Series 2 is diverging from 0/1. I'll do this in a followup PR.
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Silicon Labs Series 2 and newer devices do alternate function configuration fundamentally differently from Series 0 and 1. Pin routing is done in a centralized fashion in the GPIO peripheral, as opposed to having ROUTE registers in every peripheral. The concept of alternate function location numbers also does not exist, functions are directly assigned to GPIOs by their port and pin number. This commit adds a new pinctrl driver for devices that use DBUS. It fully makes use of pinctrl design principles as outlined in the Zephyr documentation. The previous driver hard-codes pin properties such as filter and pull-up/down in the driver itself, while the new driver leaves this up to the user as configurable DeviceTree properties. The previous driver has hard-coded support for UART, SPI and I2C, while the new driver has generic support for all DBUS signals. Signed-off-by: Aksel Skauge Mellbye <[email protected]>
Swap from silabs,gecko-pinctrl to silabs,dbus-pinctrl for all boards with Series 2 SoCs. Explicitly declare pin properties as part of pinctrl pinout configuration. Signed-off-by: Aksel Skauge Mellbye <[email protected]>
The GECKO_PIN() macro does not do anything except pass the argument through unaltered. It only serves to make DeviceTree files more verbose. It was inconsistently used, make the .dts files consistent by never using it. The DBUS pinctrl driver doesn't use the port or location macros from the gpio_gecko.h header. The pin number macro is the only other thing defined in this header. Stop including the header on Series 2 based boards. Signed-off-by: Aksel Skauge Mellbye <[email protected]>
Add release note and migration guide for silabs pinctrl driver for digital bus (dbus). Signed-off-by: Aksel Skauge Mellbye <[email protected]>
Remove implementation of pin configuration for Series 2 devices. The silabs,dbus-pinctrl driver should be used instead. Signed-off-by: Aksel Skauge Mellbye <[email protected]>
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Rebased on top of main to fix gitlint issue in compliance check. |
Silicon Labs Series 2 and newer devices do alternate function
configuration fundamentally differently from Series 0 and 1. Pin routing
is done in a centralized fashion in the GPIO peripheral, as opposed to
having ROUTE registers in every peripheral. The concept of alternate
function location numbers also does not exist, functions are directly
assigned to GPIOs by their port and pin number.
This PR adds a new pinctrl driver for devices that use DBUS.
The previous driver hard-codes pin properties such as filter
and pull-up/down in the driver itself, while the new driver leaves this up
to the user as configurable DeviceTree properties. The previous driver has
hard-coded support for UART, SPI and I2C, while the new driver has generic
support for all DBUS signals.