Add mcxa156 lpi2c support

boards/nxp/frdm_mcxa156/board.c

@@ -137,6 +137,26 @@ static int frdm_mcxa156_init(void)
 	SPC_EnableActiveModeAnalogModules(SPC0, (kSPC_controlCmp0 | kSPC_controlCmp0Dac));
 #endif
 
+#if DT_NODE_HAS_STATUS_OKAY(DT_NODELABEL(lpi2c0))
+	CLOCK_SetClockDiv(kCLOCK_DivLPI2C0, 1u);
+	CLOCK_AttachClk(kFRO12M_to_LPI2C0);
+#endif
+
+#if DT_NODE_HAS_STATUS_OKAY(DT_NODELABEL(lpi2c1))
+	CLOCK_SetClockDiv(kCLOCK_DivLPI2C1, 1u);
+	CLOCK_AttachClk(kFRO12M_to_LPI2C1);
+#endif
+
+#if DT_NODE_HAS_STATUS_OKAY(DT_NODELABEL(lpi2c2))
+	CLOCK_SetClockDiv(kCLOCK_DivLPI2C2, 1u);
+	CLOCK_AttachClk(kFRO12M_to_LPI2C2);
+#endif
+
+#if DT_NODE_HAS_STATUS_OKAY(DT_NODELABEL(lpi2c3))
+	CLOCK_SetClockDiv(kCLOCK_DivLPI2C3, 1u);
+	CLOCK_AttachClk(kFRO12M_to_LPI2C3);
+#endif
+
 #if DT_NODE_HAS_STATUS_OKAY(DT_NODELABEL(lptmr0))
 
 /*

boards/nxp/frdm_mcxa156/doc/index.rst

@@ -58,6 +58,8 @@ The FRDM-MCXA156 board configuration supports the following hardware features:
 +-----------+------------+-------------------------------------+
 | DAC       | on-chip    | dac                                 |
 +-----------+------------+-------------------------------------+
+| I2C       | on-chip    | i2c                                 |
++-----------+------------+-------------------------------------+
 | LPCMP     | on-chip    | sensor(comparator)                  |
 +-----------+------------+-------------------------------------+
 | LPTMR     | on-chip    | counter                             |

boards/nxp/frdm_mcxa156/frdm_mcxa156-pinctrl.dtsi

@@ -47,4 +47,37 @@
 			bias-pull-up;
 		};
 	};
+	pinmux_lpi2c0: pinmux_lpi2c0 {
+		group0 {
+			pinmux = <LPI2C0_SDA_P0_16>,
+			    <LPI2C0_SCL_P0_17>;
+			slew-rate = "fast";
+			drive-strength = "low";
+			input-enable;
+			bias-pull-up;
+			drive-open-drain;
+		};
+	};
+	pinmux_lpi2c2: pinmux_lpi2c2 {
+		group0 {
+			pinmux = <LPI2C2_SDA_P1_8>,
+			    <LPI2C2_SCL_P1_9>;
+			slew-rate = "fast";
+			drive-strength = "low";
+			input-enable;
+			bias-pull-up;
+			drive-open-drain;
+		};
+	};
+	pinmux_lpi2c3: pinmux_lpi2c3 {
+		group0 {
+			pinmux = <LPI2C3_SDA_P3_28>,
+			    <LPI2C3_SCL_P3_27>;
+			slew-rate = "fast";
+			drive-strength = "low";
+			input-enable;
+			bias-pull-up;
+			drive-open-drain;
+		};
+	};
 };

boards/nxp/frdm_mcxa156/frdm_mcxa156.dts

@@ -114,6 +114,18 @@
 	pinctrl-names = "default";
 };
 
+&lpi2c0 {
+	status = "okay";
+	pinctrl-0 = <&pinmux_lpi2c0>;
+	pinctrl-names = "default";
+};
+
+&lpi2c3 {
+	status = "okay";
+	pinctrl-0 = <&pinmux_lpi2c3>;
+	pinctrl-names = "default";
+};
+
 &lptmr0 {
 	status = "okay";
 };

boards/nxp/frdm_mcxa156/frdm_mcxa156.yaml

@@ -20,5 +20,6 @@ supported:
   - gpio
   - counter
   - dac
+  - i2c
   - pwm
 vendor: nxp

drivers/clock_control/clock_control_mcux_syscon.c

@@ -428,6 +428,21 @@ static int mcux_lpc_syscon_clock_control_get_subsys_rate(const struct device *de
 		*rate = CLOCK_GetLpuartClkFreq(4);
 		break;
 #endif /* defined(CONFIG_UART_MCUX_LPUART) */
+
+#if (defined(CONFIG_I2C_MCUX_LPI2C) && CONFIG_SOC_SERIES_MCXA)
+	case MCUX_LPI2C0_CLK:
+		*rate = CLOCK_GetLpi2cClkFreq(0);
+		break;
+	case MCUX_LPI2C1_CLK:
+		*rate = CLOCK_GetLpi2cClkFreq(1);
+		break;
+	case MCUX_LPI2C2_CLK:
+		*rate = CLOCK_GetLpi2cClkFreq(2);
+		break;
+	case MCUX_LPI2C3_CLK:
+		*rate = CLOCK_GetLpi2cClkFreq(3);
+		break;
+#endif /* defined(CONFIG_I2C_MCUX_LPI2C) */
 	}
 
 	return 0;

dts/arm/nxp/nxp_mcxa156.dtsi

@@ -8,6 +8,7 @@
 #include <arm/armv8-m.dtsi>
 #include <zephyr/dt-bindings/clock/mcux_lpc_syscon_clock.h>
 #include <zephyr/dt-bindings/gpio/gpio.h>
+#include <zephyr/dt-bindings/i2c/i2c.h>
 
 / {
 	cpus {
@@ -286,6 +287,50 @@
 			#io-channel-cells = <2>;
 		};
 
+		lpi2c0: i2c@4009a000 {
+			compatible = "nxp,lpi2c";
+			clock-frequency = <I2C_BITRATE_STANDARD>;
+			#address-cells = <1>;
+			#size-cells = <0>;
+			reg = <0x4009a000 0x1000>;
+			interrupts = <26 0>;
+			clocks = <&syscon MCUX_LPI2C0_CLK>;
+			status = "disabled";
+		};
+
+		lpi2c1: i2c@4009b000 {
+			compatible = "nxp,lpi2c";
+			clock-frequency = <I2C_BITRATE_STANDARD>;
+			#address-cells = <1>;
+			#size-cells = <0>;
+			reg = <0x4009b000 0x1000>;
+			interrupts = <27 0>;
+			clocks = <&syscon MCUX_LPI2C1_CLK>;
+			status = "disabled";
+		};
+
+		lpi2c2: i2c@400d4000 {
+			compatible = "nxp,lpi2c";
+			clock-frequency = <I2C_BITRATE_STANDARD>;
+			#address-cells = <1>;
+			#size-cells = <0>;
+			reg = <0x400d4000 0x1000>;
+			interrupts = <77 0>;
+			clocks = <&syscon MCUX_LPI2C2_CLK>;
+			status = "disabled";
+		};
+
+		lpi2c3: i2c@400d5000 {
+			compatible = "nxp,lpi2c";
+			clock-frequency = <I2C_BITRATE_STANDARD>;
+			#address-cells = <1>;
+			#size-cells = <0>;
+			reg = <0x400d5000 0x1000>;
+			interrupts = <78 0>;
+			clocks = <&syscon MCUX_LPI2C3_CLK>;
+			status = "disabled";
+		};
+
 		lptmr0: lptmr@400ab000 {
 			compatible = "nxp,lptmr";
 			reg = <0x400ab000 0x1000>;

include/zephyr/dt-bindings/clock/mcux_lpc_syscon_clock.h

@@ -98,4 +98,9 @@
 #define MCUX_LPUART3_CLK MCUX_LPC_CLK_ID(0x13, 0x03)
 #define MCUX_LPUART4_CLK MCUX_LPC_CLK_ID(0x13, 0x04)
 
+#define MCUX_LPI2C0_CLK MCUX_LPC_CLK_ID(0x14, 0x00)
+#define MCUX_LPI2C1_CLK MCUX_LPC_CLK_ID(0x14, 0x01)
+#define MCUX_LPI2C2_CLK MCUX_LPC_CLK_ID(0x14, 0x02)
+#define MCUX_LPI2C3_CLK MCUX_LPC_CLK_ID(0x14, 0x03)
+
 #endif /* ZEPHYR_INCLUDE_DT_BINDINGS_CLOCK_MCUX_LPC_SYSCON_H_ */

tests/drivers/i2c/i2c_target_api/boards/frdm_mcxa156.overlay

@@ -0,0 +1,26 @@
+/*
+ * Copyright 2024 NXP
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+/* To test this sample, connect
+ * LPI2C0 SCL(J2-20)  -->  LPI2C3 SCL(J5-5)
+ * LPI2C0 SDA(J2-18)  -->  LPI2C3 SDA(J5-6)
+ */
+
+&lpi2c0 {
+	eeprom0: eeprom@54 {
+		compatible = "zephyr,i2c-target-eeprom";
+		reg = <0x54>;
+		size = <256>;
+	};
+};
+
+&lpi2c3 {
+	eeprom1: eeprom@56 {
+		compatible = "zephyr,i2c-target-eeprom";
+		reg = <0x56>;
+		size = <256>;
+	};
+};

tests/drivers/i2c/i2c_target_api/testcase.yaml

@@ -45,6 +45,7 @@ tests:
       - mimxrt1060_evk
       - frdm_ke17z512
       - frdm_mcxn236
+      - frdm_mcxa156
       - max32655evkit/max32655/m4
       - max32662evkit
       - max32666evkit/max32666/cpu0