zephyrproject-rtos · rruuaanng · Dec 17, 2024
diff --git a/include/zephyr/dt-bindings/acpi/acpi.h b/include/zephyr/dt-bindings/acpi/acpi.h
@@ -3,6 +3,10 @@
  *
  * SPDX-License-Identifier: Apache-2.0
  */
+#ifndef ZEPHYR_INCLUDE_DT_BINDINGS_ACPI_ACPI_H_
+#define ZEPHYR_INCLUDE_DT_BINDINGS_ACPI_ACPI_H_
 
 #define ACPI_IRQ_DETECT 0xFFFFFFFU
 #define ACPI_IRQ_FLAG_DETECT 0xFFFFFFFU
+
+#endif /* ZEPHYR_INCLUDE_DT_BINDINGS_ACPI_ACPI_H_ */
diff --git a/include/zephyr/dt-bindings/adc/stm32_adc.h b/include/zephyr/dt-bindings/adc/stm32_adc.h
@@ -3,8 +3,8 @@
  *
  * SPDX-License-Identifier: Apache-2.0
  */
-#ifndef ZEPHYR_INCLUDE_DT_BINDINGS_STM32_ADC_H_
-#define ZEPHYR_INCLUDE_DT_BINDINGS_STM32_ADC_H_
+#ifndef ZEPHYR_INCLUDE_DT_BINDINGS_ADC_STM32_ADC_H_
+#define ZEPHYR_INCLUDE_DT_BINDINGS_ADC_STM32_ADC_H_
 
 #include <zephyr/dt-bindings/adc/adc.h>
 
@@ -84,4 +84,4 @@
 #define FULLY_CONFIGURABLE	1
 /** @} */
 
-#endif /* ZEPHYR_INCLUDE_DT_BINDINGS_STM32_ADC_H_ */
+#endif /* ZEPHYR_INCLUDE_DT_BINDINGS_ADC_STM32_ADC_H_ */
diff --git a/include/zephyr/dt-bindings/adc/stm32f1_adc.h b/include/zephyr/dt-bindings/adc/stm32f1_adc.h
@@ -3,8 +3,8 @@
  *
  * SPDX-License-Identifier: Apache-2.0
  */
-#ifndef ZEPHYR_INCLUDE_DT_BINDINGS_STM32F1_ADC_H_
-#define ZEPHYR_INCLUDE_DT_BINDINGS_STM32F1_ADC_H_
+#ifndef ZEPHYR_INCLUDE_DT_BINDINGS_ADC_STM32F1_ADC_H_
+#define ZEPHYR_INCLUDE_DT_BINDINGS_ADC_STM32F1_ADC_H_
 
 #include <zephyr/dt-bindings/adc/stm32_adc.h>
 
@@ -23,4 +23,4 @@
 #define STM32F1_ADC_RES(resolution)	\
 	STM32_ADC_RES(resolution, STM32_ADC_RES_REG_VAL)
 
-#endif /* ZEPHYR_INCLUDE_DT_BINDINGS_STM32F1_ADC_H_ */
+#endif /* ZEPHYR_INCLUDE_DT_BINDINGS_ADC_STM32F1_ADC_H_ */
diff --git a/include/zephyr/dt-bindings/adc/stm32f4_adc.h b/include/zephyr/dt-bindings/adc/stm32f4_adc.h
@@ -3,8 +3,8 @@
  *
  * SPDX-License-Identifier: Apache-2.0
  */
-#ifndef ZEPHYR_INCLUDE_DT_BINDINGS_STM32F4_ADC_H_
-#define ZEPHYR_INCLUDE_DT_BINDINGS_STM32F4_ADC_H_
+#ifndef ZEPHYR_INCLUDE_DT_BINDINGS_ADC_STM32F4_ADC_H_
+#define ZEPHYR_INCLUDE_DT_BINDINGS_ADC_STM32F4_ADC_H_
 
 #include <zephyr/dt-bindings/adc/stm32_adc.h>
 
@@ -13,4 +13,4 @@
 #define STM32_ADC_RES_SHIFT	24
 #define STM32_ADC_RES_MASK	BIT_MASK(2)
 
-#endif /* ZEPHYR_INCLUDE_DT_BINDINGS_STM32F4_ADC_H_ */
+#endif /* ZEPHYR_INCLUDE_DT_BINDINGS_ADC_STM32F4_ADC_H_ */
diff --git a/include/zephyr/dt-bindings/adc/stm32h7_adc.h b/include/zephyr/dt-bindings/adc/stm32h7_adc.h
@@ -3,8 +3,8 @@
  *
  * SPDX-License-Identifier: Apache-2.0
  */
-#ifndef ZEPHYR_INCLUDE_DT_BINDINGS_STM32H7_ADC_H_
-#define ZEPHYR_INCLUDE_DT_BINDINGS_STM32H7_ADC_H_
+#ifndef ZEPHYR_INCLUDE_DT_BINDINGS_ADC_STM32H7_ADC_H_
+#define ZEPHYR_INCLUDE_DT_BINDINGS_ADC_STM32H7_ADC_H_
 
 #include <zephyr/dt-bindings/adc/stm32_adc.h>
 
@@ -24,4 +24,4 @@
 	STM32_ADC(resolution, reg_val, STM32H72X_ADC3_RES_MASK, \
 		  STM32H72X_ADC3_RES_SHIFT, STM32_ADC_RES_REG)
 
-#endif /* ZEPHYR_INCLUDE_DT_BINDINGS_STM32H7_ADC_H_ */
+#endif /* ZEPHYR_INCLUDE_DT_BINDINGS_ADC_STM32H7_ADC_H_ */
diff --git a/include/zephyr/dt-bindings/adc/stm32l4_adc.h b/include/zephyr/dt-bindings/adc/stm32l4_adc.h
@@ -3,8 +3,8 @@
  *
  * SPDX-License-Identifier: Apache-2.0
  */
-#ifndef ZEPHYR_INCLUDE_DT_BINDINGS_STM32L4_ADC_H_
-#define ZEPHYR_INCLUDE_DT_BINDINGS_STM32L4_ADC_H_
+#ifndef ZEPHYR_INCLUDE_DT_BINDINGS_ADC_STM32L4_ADC_H_
+#define ZEPHYR_INCLUDE_DT_BINDINGS_ADC_STM32L4_ADC_H_
 
 #include <zephyr/dt-bindings/adc/stm32_adc.h>
 
@@ -13,4 +13,4 @@
 #define STM32_ADC_RES_SHIFT	3
 #define STM32_ADC_RES_MASK	BIT_MASK(2)
 
-#endif /* ZEPHYR_INCLUDE_DT_BINDINGS_STM32L4_ADC_H_ */
+#endif /* ZEPHYR_INCLUDE_DT_BINDINGS_ADC_STM32L4_ADC_H_ */
diff --git a/include/zephyr/dt-bindings/adc/stm32u5_adc.h b/include/zephyr/dt-bindings/adc/stm32u5_adc.h
@@ -3,8 +3,8 @@
  *
  * SPDX-License-Identifier: Apache-2.0
  */
-#ifndef ZEPHYR_INCLUDE_DT_BINDINGS_STM32U5_ADC_H_
-#define ZEPHYR_INCLUDE_DT_BINDINGS_STM32U5_ADC_H_
+#ifndef ZEPHYR_INCLUDE_DT_BINDINGS_ADC_STM32U5_ADC_H_
+#define ZEPHYR_INCLUDE_DT_BINDINGS_ADC_STM32U5_ADC_H_
 
 #include <zephyr/dt-bindings/adc/stm32_adc.h>
 
@@ -13,4 +13,4 @@
 #define STM32_ADC_RES_SHIFT	2
 #define STM32_ADC_RES_MASK	BIT_MASK(2)
 
-#endif /* ZEPHYR_INCLUDE_DT_BINDINGS_STM32U5_ADC_H_ */
+#endif /* ZEPHYR_INCLUDE_DT_BINDINGS_ADC_STM32U5_ADC_H_ */
diff --git a/include/zephyr/dt-bindings/clock/ch32v00x-clocks.h b/include/zephyr/dt-bindings/clock/ch32v00x-clocks.h
@@ -4,8 +4,8 @@
  * SPDX-License-Identifier: Apache-2.0
  */
 
-#ifndef __CH32V00X_CLOCKS_H__
-#define __CH32V00X_CLOCKS_H__
+#ifndef ZEPHYR_INCLUDE_DT_BINDINGS_CLOCK_CH32V00X_CLOCKS_H_
+#define ZEPHYR_INCLUDE_DT_BINDINGS_CLOCK_CH32V00X_CLOCKS_H_
 
 #define CH32V00X_AHB_PCENR_OFFSET  0
 #define CH32V00X_APB2_PCENR_OFFSET 1
@@ -39,4 +39,4 @@
 #define CH32V00X_CLOCK_PWR    CH32V00X_CLOCK_CONFIG(APB1, 28)
 #define CH32V00X_CLOCK_USB    CH32V00X_CLOCK_CONFIG(APB1, 23)
 
-#endif
+#endif /* ZEPHYR_INCLUDE_DT_BINDINGS_CLOCK_CH32V00X_CLOCKS_H_ */
diff --git a/include/zephyr/dt-bindings/clock/imx8ulp_clock.h b/include/zephyr/dt-bindings/clock/imx8ulp_clock.h
@@ -4,8 +4,8 @@
  * SPDX-License-Identifier: Apache-2.0
  */
 
-#ifndef _INCLUDE_ZEPHYR_DT_BINDINGS_CLOCK_IMX8ULP_CLOCK_H_
-#define _INCLUDE_ZEPHYR_DT_BINDINGS_CLOCK_IMX8ULP_CLOCK_H_
+#ifndef ZEPHYR_INCLUDE_DT_BINDINGS_CLOCK_IMX8ULP_CLOCK_H_
+#define ZEPHYR_INCLUDE_DT_BINDINGS_CLOCK_IMX8ULP_CLOCK_H_
 
 /* IMPORTANT: the indexes used by these macros need to
  * match the indexes in the PCC driver LUT at which the
@@ -15,4 +15,4 @@
 /* clocks managed by PCC4 */
 #define IMX8ULP_CLOCK_LPUART7 0
 
-#endif /* _INCLUDE_ZEPHYR_DT_BINDINGS_CLOCK_IMX8ULP_CLOCK_H_ */
+#endif /* ZEPHYR_INCLUDE_DT_BINDINGS_CLOCK_IMX8ULP_CLOCK_H_ */
diff --git a/include/zephyr/dt-bindings/clock/r7fa4m1xxxxxx-clock.h b/include/zephyr/dt-bindings/clock/r7fa4m1xxxxxx-clock.h
@@ -4,9 +4,9 @@
  * SPDX-License-Identifier: Apache-2.0
  */
 
-#ifndef ZEPHYR_DT_BINDINGS_CLOCK_R7FA4M1XXXXXX_CLOCK_H_
-#define ZEPHYR_DT_BINDINGS_CLOCK_R7FA4M1XXXXXX_CLOCK_H_
+#ifndef ZEPHYR_INCLUDE_DT_BINDINGS_CLOCK_R7FA4M1XXXXXX_CLOCK_H_
+#define ZEPHYR_INCLUDE_DT_BINDINGS_CLOCK_R7FA4M1XXXXXX_CLOCK_H_
 
 #include <zephyr/dt-bindings/clock/renesas-ra-cgc.h>
 
-#endif /* ZEPHYR_DT_BINDINGS_CLOCK_R7FA4M1XXXXXX_CLOCK_H_ */
+#endif /* ZEPHYR_INCLUDE_DT_BINDINGS_CLOCK_R7FA4M1XXXXXX_CLOCK_H_ */
diff --git a/include/zephyr/dt-bindings/clock/ra_clock.h b/include/zephyr/dt-bindings/clock/ra_clock.h
@@ -4,13 +4,13 @@
  * SPDX-License-Identifier: Apache-2.0
  */
 
-#ifndef ZEPHYR_INCLUDE_DT_BINDINGS_CLOCK_RA_H_
-#define ZEPHYR_INCLUDE_DT_BINDINGS_CLOCK_RA_H_
+#ifndef ZEPHYR_INCLUDE_DT_BINDINGS_CLOCK_RA_CLOCK_H_
+#define ZEPHYR_INCLUDE_DT_BINDINGS_CLOCK_RA_CLOCK_H_
 
 #define MSTPA 0
 #define MSTPB 1
 #define MSTPC 2
 #define MSTPD 3
 #define MSTPE 4
 
-#endif /* ZEPHYR_INCLUDE_DT_BINDINGS_CLOCK_RA_H_ */
+#endif /* ZEPHYR_INCLUDE_DT_BINDINGS_CLOCK_RA_CLOCK_H_ */
diff --git a/include/zephyr/dt-bindings/clock/scg_k4.h b/include/zephyr/dt-bindings/clock/scg_k4.h
@@ -2,6 +2,8 @@
  * Copyright 2023 NXP
  * SPDX-License-Identifier: Apache-2.0
  */
+#ifndef ZEPHYR_INCLUDE_DT_BINDINGS_CLOCK_SCG_K4_H_
+#define ZEPHYR_INCLUDE_DT_BINDINGS_CLOCK_SCG_K4_H_
 
 #define SCG_K4_CORESYS_CLK 0U
 #define SCG_K4_SLOW_CLK    1U
@@ -12,3 +14,5 @@
 #define SCG_K4_SIRC_CLK    6U
 #define SCG_K4_FIRC_CLK    7U
 #define SCG_K4_RTCOSC_CLK  8U
+
+#endif /* ZEPHYR_INCLUDE_DT_BINDINGS_CLOCK_SCG_K4_H_ */
diff --git a/include/zephyr/dt-bindings/dai/esai.h b/include/zephyr/dt-bindings/dai/esai.h
@@ -4,8 +4,8 @@
  * SPDX-License-Identifier: Apache-2.0
  */
 
-#ifndef _INCLUDE_ZEPHYR_DT_BINDINGS_DAI_ESAI_H_
-#define _INCLUDE_ZEPHYR_DT_BINDINGS_DAI_ESAI_H_
+#ifndef ZEPHYR_INCLUDE_DT_BINDINGS_DAI_ESAI_H_
+#define ZEPHYR_INCLUDE_DT_BINDINGS_DAI_ESAI_H_
 
 /* ESAI pin IDs
  * the values of these macros are meant to match
@@ -51,4 +51,4 @@
 #define ESAI_CLOCK_INPUT 0
 #define ESAI_CLOCK_OUTPUT 1
 
-#endif /* _INCLUDE_ZEPHYR_DT_BINDINGS_DAI_ESAI_H_ */
+#endif /* ZEPHYR_INCLUDE_DT_BINDINGS_DAI_ESAI_H_ */
diff --git a/include/zephyr/dt-bindings/dma/gd32_dma.h b/include/zephyr/dt-bindings/dma/gd32_dma.h
@@ -4,8 +4,8 @@
  * SPDX-License-Identifier: Apache-2.0
  */
 
-#ifndef ZEPHYR_INCLUDE_DT_BINDINGS_GD32_DMA_H_
-#define ZEPHYR_INCLUDE_DT_BINDINGS_GD32_DMA_H_
+#ifndef ZEPHYR_INCLUDE_DT_BINDINGS_DMA_GD32_DMA_H_
+#define ZEPHYR_INCLUDE_DT_BINDINGS_DMA_GD32_DMA_H_
 
 /* macros for channel-cfg */
 
@@ -47,4 +47,4 @@
 #define GD32_DMA_PRIORITY_HIGH	      GD32_DMA_CH_CFG_PRIORITY(2)
 #define GD32_DMA_PRIORITY_VERY_HIGH   GD32_DMA_CH_CFG_PRIORITY(3)
 
-#endif /* ZEPHYR_INCLUDE_DT_BINDINGS_GD32_DMA_H_ */
+#endif /* ZEPHYR_INCLUDE_DT_BINDINGS_DMA_GD32_DMA_H_ */
diff --git a/include/zephyr/dt-bindings/dma/rpi_pico_dma.h b/include/zephyr/dt-bindings/dma/rpi_pico_dma.h
@@ -4,8 +4,8 @@
  * SPDX-License-Identifier: Apache-2.0
  */
 
-#ifndef ZEPHYR_INCLUDE_DT_BINDINGS_RPI_PICO_DMA_H_
-#define ZEPHYR_INCLUDE_DT_BINDINGS_RPI_PICO_DMA_H_
+#ifndef ZEPHYR_INCLUDE_DT_BINDINGS_DMA_RPI_PICO_DMA_H_
+#define ZEPHYR_INCLUDE_DT_BINDINGS_DMA_RPI_PICO_DMA_H_
 
 /*
  * Use lower 6-bit of inverted DREQ value for `slot` cell.
@@ -61,4 +61,4 @@
 #define RPI_PICO_DMA_SLOT_DMA_TIMER3 RPI_PICO_DMA_DREQ_TO_SLOT(0x3E)
 #define RPI_PICO_DMA_SLOT_FORCE	     RPI_PICO_DMA_DREQ_TO_SLOT(0x3F)
 
-#endif /* ZEPHYR_INCLUDE_DT_BINDINGS_RPI_PICO_DMA_H_ */
+#endif /* ZEPHYR_INCLUDE_DT_BINDINGS_DMA_RPI_PICO_DMA_H_ */
diff --git a/include/zephyr/dt-bindings/dma/stm32_dma.h b/include/zephyr/dt-bindings/dma/stm32_dma.h
@@ -3,8 +3,8 @@
  *
  * SPDX-License-Identifier: Apache-2.0
  */
-#ifndef ZEPHYR_INCLUDE_DT_BINDINGS_STM32_DMA_H_
-#define ZEPHYR_INCLUDE_DT_BINDINGS_STM32_DMA_H_
+#ifndef ZEPHYR_INCLUDE_DT_BINDINGS_DMA_STM32_DMA_H_
+#define ZEPHYR_INCLUDE_DT_BINDINGS_DMA_STM32_DMA_H_
 
 /**
  * @name custom DMA flags for channel configuration
@@ -70,4 +70,4 @@
 
 /** @} */
 
-#endif /* ZEPHYR_INCLUDE_DT_BINDINGS_STM32_DMA_H_ */
+#endif /* ZEPHYR_INCLUDE_DT_BINDINGS_DMA_STM32_DMA_H_ */
diff --git a/include/zephyr/dt-bindings/ethernet/nxp_enet.h b/include/zephyr/dt-bindings/ethernet/nxp_enet.h
@@ -4,12 +4,12 @@
  * SPDX-License-Identifier: Apache-2.0
  */
 
-#ifndef ZEPHYR_INCLUDE_DT_BINDINGS_NXP_ENET_H_
-#define ZEPHYR_INCLUDE_DT_BINDINGS_NXP_ENET_H_
+#ifndef ZEPHYR_INCLUDE_DT_BINDINGS_ETHERNET_NXP_ENET_H_
+#define ZEPHYR_INCLUDE_DT_BINDINGS_ETHERNET_NXP_ENET_H_
 
 #define NXP_ENET_MII_MODE	0
 #define NXP_ENET_RMII_MODE	1
 #define NXP_ENET_RGMII_MODE	2
 #define NXP_ENET_INVALID_MII_MODE 100
 
-#endif /* ZEPHYR_INCLUDE_DT_BINDINGS_NXP_ENET_H_ */
+#endif /* ZEPHYR_INCLUDE_DT_BINDINGS_ETHERNET_NXP_ENET_H_ */
diff --git a/include/zephyr/dt-bindings/flash_controller/npcx_fiu_qspi.h b/include/zephyr/dt-bindings/flash_controller/npcx_fiu_qspi.h
@@ -3,8 +3,8 @@
  *
  * SPDX-License-Identifier: Apache-2.0
  */
-#ifndef ZEPHYR_INCLUDE_DT_BINDINGS_CLOCK_NPCK_FIU_QSPI_H_
-#define ZEPHYR_INCLUDE_DT_BINDINGS_CLOCK_NPCK_FIU_QSPI_H_
+#ifndef ZEPHYR_INCLUDE_DT_BINDINGS_FLASH_CONTROLLER_NPCX_FIU_QSPI_H_
+#define ZEPHYR_INCLUDE_DT_BINDINGS_FLASH_CONTROLLER_NPCX_FIU_QSPI_H_
 
 #include <zephyr/dt-bindings/dt-util.h>
 
@@ -22,4 +22,4 @@
 #define NPCX_RD_MODE_FAST	1
 #define NPCX_RD_MODE_FAST_DUAL	3
 
-#endif /* ZEPHYR_INCLUDE_DT_BINDINGS_CLOCK_NPCK_FIU_QSPI_H_ */
+#endif /* ZEPHYR_INCLUDE_DT_BINDINGS_FLASH_CONTROLLER_NPCX_FIU_QSPI_H_ */
diff --git a/include/zephyr/dt-bindings/flash_controller/ospi.h b/include/zephyr/dt-bindings/flash_controller/ospi.h
@@ -3,8 +3,8 @@
  *
  * SPDX-License-Identifier: Apache-2.0
  */
-#ifndef ZEPHYR_INCLUDE_DT_BINDINGS_OSPI_H_
-#define ZEPHYR_INCLUDE_DT_BINDINGS_OSPI_H_
+#ifndef ZEPHYR_INCLUDE_DT_BINDINGS_FLASH_CONTROLLER_OSPI_H_
+#define ZEPHYR_INCLUDE_DT_BINDINGS_FLASH_CONTROLLER_OSPI_H_
 
 /**
  * @name OSPI definition for the OctoSPI peripherals
@@ -30,4 +30,4 @@
 /* Double Transfer Rate */
 #define OSPI_DTR_TRANSFER                 2
 
-#endif /* ZEPHYR_INCLUDE_DT_BINDINGS_OSPI_H_ */
+#endif /* ZEPHYR_INCLUDE_DT_BINDINGS_FLASH_CONTROLLER_OSPI_H_ */
diff --git a/include/zephyr/dt-bindings/flash_controller/xspi.h b/include/zephyr/dt-bindings/flash_controller/xspi.h
@@ -3,8 +3,8 @@
  *
  * SPDX-License-Identifier: Apache-2.0
  */
-#ifndef ZEPHYR_INCLUDE_DT_BINDINGS_XSPI_H_
-#define ZEPHYR_INCLUDE_DT_BINDINGS_XSPI_H_
+#ifndef ZEPHYR_INCLUDE_DT_BINDINGS_FLASH_CONTROLLER_XSPI_H_
+#define ZEPHYR_INCLUDE_DT_BINDINGS_FLASH_CONTROLLER_XSPI_H_
 
 /**
  * @name XSPI definition for the xSPI peripherals
@@ -28,4 +28,4 @@
 /* Double Transfer Rate */
 #define XSPI_DTR_TRANSFER                 2
 
-#endif /* ZEPHYR_INCLUDE_DT_BINDINGS_XSPI_H_ */
+#endif /* ZEPHYR_INCLUDE_DT_BINDINGS_FLASH_CONTROLLER_XSPI_H_ */
diff --git a/include/zephyr/dt-bindings/gnss/u_blox_m8.h b/include/zephyr/dt-bindings/gnss/u_blox_m8.h
@@ -4,8 +4,8 @@
  * SPDX-License-Identifier: Apache-2.0
  */
 
-#ifndef ZEPHYR_INCLUDE_DT_BINDINGS_U_BLOX_M8_H_
-#define ZEPHYR_INCLUDE_DT_BINDINGS_U_BLOX_M8_H_
+#ifndef ZEPHYR_INCLUDE_DT_BINDINGS_GNSS_U_BLOX_M8_H_
+#define ZEPHYR_INCLUDE_DT_BINDINGS_GNSS_U_BLOX_M8_H_
 
 #include <zephyr/dt-bindings/dt-util.h>
 
@@ -20,4 +20,4 @@
 #define UBX_M8_UART_BAUDRATE_460800	0x07
 #define UBX_M8_UART_BAUDRATE_921600	0x08
 
-#endif /* ZEPHYR_INCLUDE_DT_BINDINGS_U_BLOX_M8_H_ */
+#endif /* ZEPHYR_INCLUDE_DT_BINDINGS_GNSS_U_BLOX_M8_H_ */
diff --git a/include/zephyr/dt-bindings/gpio/st-morpho-header.h b/include/zephyr/dt-bindings/gpio/st-morpho-header.h
@@ -2,8 +2,8 @@
  * Copyright (c) 2023 Teslabs Engineering S.L.
  * SPDX-License-Identifier: Apache-2.0
  */
-#ifndef INCLUDE_ZEPHYR_DT_BINDINGS_GPIO_ST_MORPHO_HEADER_H_
-#define INCLUDE_ZEPHYR_DT_BINDINGS_GPIO_ST_MORPHO_HEADER_H_
+#ifndef ZEPHYR_INCLUDE_DT_BINDINGS_GPIO_ST_MORPHO_HEADER_H_
+#define ZEPHYR_INCLUDE_DT_BINDINGS_GPIO_ST_MORPHO_HEADER_H_
 
 /** ST Morpho pin mask (0...143). */
 #define ST_MORPHO_PIN_MASK 0xFF
@@ -160,4 +160,4 @@
 
 /** @} */
 
-#endif /* INCLUDE_ZEPHYR_DT_BINDINGS_GPIO_ST_MORPHO_HEADER_H_ */
+#endif /* ZEPHYR_INCLUDE_DT_BINDINGS_GPIO_ST_MORPHO_HEADER_H_ */
diff --git a/include/zephyr/dt-bindings/i2c/it8xxx2-i2c.h b/include/zephyr/dt-bindings/i2c/it8xxx2-i2c.h
@@ -3,8 +3,8 @@
  *
  * SPDX-License-Identifier: Apache-2.0
  */
-#ifndef ZEPHYR_INCLUDE_DT_BINDINGS_I2C_IT8XXX2_H_
-#define ZEPHYR_INCLUDE_DT_BINDINGS_I2C_IT8XXX2_H_
+#ifndef ZEPHYR_INCLUDE_DT_BINDINGS_I2C_IT8XXX2_I2C_H_
+#define ZEPHYR_INCLUDE_DT_BINDINGS_I2C_IT8XXX2_I2C_H_
 
 
 #define IT8XXX2_ECPM_CGCTRL4R_OFF	0x09
@@ -28,4 +28,4 @@
 #define I2C_CHE_LOCATE		4
 #define I2C_CHF_LOCATE		5
 
-#endif	/* ZEPHYR_INCLUDE_DT_BINDINGS_I2C_IT8XXX2_H_ */
+#endif	/* ZEPHYR_INCLUDE_DT_BINDINGS_I2C_IT8XXX2_I2C_H_ */
diff --git a/include/zephyr/dt-bindings/input/cst816s-gesture-codes.h b/include/zephyr/dt-bindings/input/cst816s-gesture-codes.h
@@ -15,4 +15,4 @@
 #define CST816S_GESTURE_CODE_DOUBLE_CLICK 0x0B
 #define CST816S_GESTURE_CODE_LONG_PRESS   0x0C
 
-#endif
+#endif /* ZEPHYR_INCLUDE_DT_BINDINGS_INPUT_CST816S_GESTURE_CODES_H_ */
diff --git a/include/zephyr/dt-bindings/inputmux/inputmux_trigger_ports.h b/include/zephyr/dt-bindings/inputmux/inputmux_trigger_ports.h
@@ -21,4 +21,4 @@
 #define LPC55S36_DMA1_OTRIG_BASE 0x24000002
 #define LPC55S36_DMA1_ITRIG_BASE 0x20000008
 
-#endif
+#endif /* ZEPHYR_INCLUDE_DT_BINDINGS_INPUTMUX_TRIGGER_PORTS_H_ */