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AP_HAL_ChibiOS: can only support PWM1-4 with bdshot
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andyp1per committed Oct 17, 2023
1 parent 131826a commit 91cd8f0
Showing 1 changed file with 4 additions and 5 deletions.
9 changes: 4 additions & 5 deletions libraries/AP_HAL_ChibiOS/hwdef/iomcu-f103-dshot/hwdef.dat
Original file line number Diff line number Diff line change
Expand Up @@ -15,18 +15,17 @@ STM32_ST_USE_TIMER 1

define HAL_WITH_ESC_TELEM 1

undef PA0 PA1 PB8 PB9 PA6 PA7 PB0 PB1
undef PA0 PA1 PB8 PB9

# the order is important here as it determines the order that timers are used to sending dshot
# TIM4 needs to go first so that TIM4_UP can be freed up to be used by input capture for TIM2
PB8 TIM4_CH3 TIM4 PWM(3) GPIO(103) BIDIR
PB9 TIM4_CH4 TIM4 PWM(4) GPIO(104)
PA0 TIM2_CH1 TIM2 PWM(1) GPIO(101)
PA1 TIM2_CH2 TIM2 PWM(2) GPIO(102) BIDIR # DMA channel 7, shared with TIM4_UP and USART2_TX
PA6 TIM3_CH1 TIM3 PWM(5) GPIO(105)
PA7 TIM3_CH2 TIM3 PWM(6) GPIO(106)
PB0 TIM3_CH3 TIM3 PWM(7) GPIO(107)
PB1 TIM3_CH4 TIM3 PWM(8) GPIO(108) BIDIR # DMA channel 3, shared with TIM3_UP

# currently no support for having mixed outputs on the same timer
# PB1 TIM3_CH4 TIM3 PWM(8) GPIO(108) BIDIR # DMA channel 3, shared with TIM3_UP

# TIM2_UP - (1,2)
# TIM4_UP - (1,7)
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