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Create AP_RCProtocol::FDM and AP_RCProtocol::UDP_Packed16BitValues #26510
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Tested XPlane RC Inputs the same as master. Not quite, Master:
This:
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i'd prefer UDP not whatever the heck this is
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... and use them in SITL.
Do we really need to worry about the hand-over from port-5501 input to FDM so much?
i.e. if you manage to be sending packed values to port 5501 and then connect to the simulator - do you really expect to then get RC input from FlightAxis?
Tested "normal" SITL using
sim_vehicle.py
.Tested the FDM input using FlightAxis.