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A7-A11 SoC support #403
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A7-A11 SoC support #403
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Add UART bases for A7-A11, T2 SoCs. Signed-off-by: Nick Chan <[email protected]>
These functions will be used to skip over parts not supported by A7-A11 SoCs. Signed-off-by: Nick Chan <[email protected]>
Cyclone and Typhoon are similar enough to share a file. Hurricane and Zephyr are the physical cores on A10 backing the Hurricane-Zephyr logical core. Signed-off-by: Nick Chan <[email protected]>
A7-A9X has an EL3. Handle it (without SMP support). Signed-off-by: Nick Chan <[email protected]>
This includes - GXF - SPRR - PAN (A7-A9) - Atomics (A7-A10) - FIPI (A7-A10) - DCP SPRR on T8030 seems to be quite different from M1 (at least according to qemu-t8030), so keep it disabled for those CPU parts. Signed-off-by: Nick Chan <[email protected]>
Boot-args version 1 (iOS 12), and version 3 (iOS 18, macOS 15). Signed-off-by: Nick Chan <[email protected]>
Add support for 4K page sizes, supported by A7-A8X. Co-developed-by: fenfenS <[email protected]> Signed-off-by: fenfenS <[email protected]> Signed-off-by: Nick Chan <[email protected]>
This includes: - EL3 handling - "Slow" IPI support - New start offsets Signed-off-by: Nick Chan <[email protected]>
Old ADT does not have /cpus/cpu<n>/cpu-impl-reg, and the value is in /arm-io/pmgr/reg[2*n+2]. Signed-off-by: Nick Chan <[email protected]>
On A7-A11 we have a ROM exploit and we can keep CPU0 RVBAR unlocked. Signed-off-by: Nick Chan <[email protected]>
Signed-off-by: Nick Chan <[email protected]>
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Changes v3:
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(... for the proxyclient changes that needs to exist to actually interface with m1n1, I don't have anything that looks remotely okay it's all ugly hacks) |
Signed-off-by: Nick Chan <[email protected]>
This includes: - Do not treat iPhone 5 buffer as dummy on 5s - Added support for 24-bit framebuffer - When we have a vertical display, use whole fb as console Signed-off-by: Nick Chan <[email protected]>
Account for the differences between the iOS ADT and macOS ADT, and also some physical differences between Apple Silicon Macs and A7-A11 devoces, reflected in the ADT. Signed-off-by: Nick Chan <[email protected]>
The secondary CPU may potentially use the stack after leaving WFE. Signed-off-by: Nick Chan <[email protected]>
Signed-off-by: Nick Chan <[email protected]>
Signed-off-by: Nick Chan <[email protected]>
At some point Apple ran out of bits and have to widen the device field to 16-bit. This adds support for the old 8-bit layout. Signed-off-by: Nick Chan <[email protected]>
We do not support the USB controller on A7-A11 SoCs yet, but still do not try to init dwc3 on them. Signed-off-by: Nick Chan <[email protected]>
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marcan
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Let's merge, if there are any issues we'll fix as we go along. Thanks! |
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Add support for A7-A11 SoCs found in various iPhones, iPads, iPod touches and Apple TVs.