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fix modelsim compile_definitions
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Risto97 committed Oct 10, 2024
1 parent 76e4b04 commit 43078ef
Showing 1 changed file with 7 additions and 0 deletions.
7 changes: 7 additions & 0 deletions cmake/sim/modelsim/modelsim.cmake
Original file line number Diff line number Diff line change
Expand Up @@ -148,8 +148,15 @@ function(modelsim IP_LIB)
list(APPEND MODELSIM_COMP_TARGETS ${IP_LIB}_modelsim_compile_lib)
endif()

get_ip_compile_definitions(COMP_DEFS ${IP_LIB} VHDL SYSTEMVERILOG VERILOG)

foreach(def ${COMP_DEFS})
list(APPEND CMP_DEFS_ARG +${def})
endforeach()

set(__VSIM_CMD vsim
${LIB_ARGS}
${CMP_DEFS_ARG}
-c ${LIBRARY}.${ARG_TOP_MODULE}
-do "run -all\; quit"

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