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Allow for immutable debug settings in ddr3_debug #45

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30 changes: 20 additions & 10 deletions ddr3_debug.c
Original file line number Diff line number Diff line change
Expand Up @@ -99,18 +99,21 @@ SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
#include "mv_ddr_training_db.h"
#include "mv_ddr_regs.h"

#if !defined(CONFIG_DDR_IMMUTABLE_DEBUG_SETTINGS)
u8 is_reg_dump = 0;
u8 debug_pbs = DEBUG_LEVEL_ERROR;
#endif

/*
* API to change flags outside of the lib
*/
#if defined(SILENT_LIB)
#if defined(SILENT_LIB) || defined(CONFIG_DDR_IMMUTABLE_DEBUG_SETTINGS)
void ddr3_hws_set_log_level(enum ddr_lib_debug_block block, u8 level)
{
/* do nothing */
}
#else /* SILENT_LIB */
#else /* !SILENT_LIB && !CONFIG_DDR_IMMUTABLE_DEBUG_SETTINGS */

/* Debug flags for other Training modules */
u8 debug_training_static = DEBUG_LEVEL_ERROR;
u8 debug_training = DEBUG_LEVEL_ERROR;
Expand Down Expand Up @@ -196,7 +199,7 @@ void ddr3_hws_set_log_level(enum ddr_lib_debug_block block, u8 level)
#endif /* CONFIG_DDR4 */
}
}
#endif /* SILENT_LIB */
#endif /* !SILENT_LIB && !CONFIG_DDR_IMMUTABLE_DEBUG_SETTINGS */

#if defined(DDR_VIEWER_TOOL)
static char *convert_freq(enum mv_ddr_freq freq);
Expand All @@ -206,16 +209,14 @@ u32 ctrl_adll[MAX_CS_NUM * MAX_INTERFACE_NUM * MAX_BUS_NUM];
u32 ctrl_adll1[MAX_CS_NUM * MAX_INTERFACE_NUM * MAX_BUS_NUM];
u32 ctrl_level_phase[MAX_CS_NUM * MAX_INTERFACE_NUM * MAX_BUS_NUM];
#endif /* EXCLUDE_SWITCH_DEBUG */

static u8 is_validate_window_per_if = 0;
static u8 is_validate_window_per_pup = 0;
static u8 sweep_cnt = 1;
static u8 is_run_leveling_sweep_tests;
#endif /* DDR_VIEWER_TOOL */

struct hws_tip_config_func_db config_func_info[MAX_DEVICE_NUM];
u8 is_default_centralization = 0;
u8 is_tune_result = 0;
u8 is_validate_window_per_if = 0;
u8 is_validate_window_per_pup = 0;
u8 sweep_cnt = 1;
u32 is_bist_reset_bit = 1;
u8 is_run_leveling_sweep_tests;

static struct hws_xsb_info xsb_info[MAX_DEVICE_NUM];

Expand Down Expand Up @@ -491,6 +492,15 @@ int ddr3_tip_print_log(u32 dev_num, u32 mem_addr)
}
#endif /* DDR_VIEWER_TOOL */

/* return early if we won't print anything anyway */
if (
#if defined(SILENT_LIB)
1 ||
#endif
debug_training < DEBUG_LEVEL_INFO) {
return MV_OK;
}

for (if_id = 0; if_id <= MAX_INTERFACE_NUM - 1; if_id++) {
VALIDATE_IF_ACTIVE(tm->if_act_mask, if_id);

Expand Down
3 changes: 2 additions & 1 deletion ddr3_init.c
Original file line number Diff line number Diff line change
Expand Up @@ -133,7 +133,8 @@ int ddr3_init(void)
mv_ddr_pre_training_soc_config(ddr_type);

/* Set log level for training library */
mv_ddr_user_log_level_set(DEBUG_BLOCK_ALL);
if (!IS_ENABLED(CONFIG_DDR_IMMUTABLE_DEBUG_SETTINGS))
mv_ddr_user_log_level_set(DEBUG_BLOCK_ALL);

mv_ddr_early_init();

Expand Down
43 changes: 35 additions & 8 deletions ddr3_init.h
Original file line number Diff line number Diff line change
Expand Up @@ -148,15 +148,46 @@ enum log_level {
#define MISL_PHY_ODT_N_OFFS 0x0

/* Globals */
extern u8 debug_training, debug_calibration, debug_ddr4_centralization,
debug_tap_tuning, debug_dm_tuning;
#if defined(CONFIG_DDR_IMMUTABLE_DEBUG_SETTINGS)
static const u8 is_reg_dump = 0;
static const u8 debug_training_static = DEBUG_LEVEL_ERROR;
static const u8 debug_training = DEBUG_LEVEL_ERROR;
static const u8 debug_leveling = DEBUG_LEVEL_ERROR;
static const u8 debug_centralization = DEBUG_LEVEL_ERROR;
static const u8 debug_training_ip = DEBUG_LEVEL_ERROR;
static const u8 debug_training_bist = DEBUG_LEVEL_ERROR;
static const u8 debug_training_hw_alg = DEBUG_LEVEL_ERROR;
static const u8 debug_training_access = DEBUG_LEVEL_ERROR;
static const u8 debug_training_device = DEBUG_LEVEL_ERROR;
static const u8 debug_pbs = DEBUG_LEVEL_ERROR;

static const u8 debug_tap_tuning = DEBUG_LEVEL_ERROR;
static const u8 debug_calibration = DEBUG_LEVEL_ERROR;
static const u8 debug_ddr4_centralization = DEBUG_LEVEL_ERROR;
static const u8 debug_dm_tuning = DEBUG_LEVEL_ERROR;
#else /* !CONFIG_DDR_IMMUTABLE_DEBUG_SETTINGS */
extern u8 is_reg_dump;
extern u8 debug_training_static;
extern u8 debug_training;
extern u8 debug_leveling;
extern u8 debug_centralization;
extern u8 debug_training_ip;
extern u8 debug_training_bist;
extern u8 debug_training_hw_alg;
extern u8 debug_training_access;
extern u8 debug_training_device;
extern u8 debug_pbs;

extern u8 debug_tap_tuning;
extern u8 debug_calibration;
extern u8 debug_ddr4_centralization;
extern u8 debug_dm_tuning;
#endif /* !CONFIG_DDR_IMMUTABLE_DEBUG_SETTINGS */

extern u8 generic_init_controller;
/* list of allowed frequency listed in order of enum mv_ddr_freq */
extern u32 is_pll_old;
extern struct pattern_info pattern_table[];
extern u8 debug_centralization, debug_training_ip, debug_training_bist,
debug_pbs, debug_training_static, debug_leveling;
extern struct hws_tip_config_func_db config_func_info[];
extern u8 twr_mask_table[];
extern u8 cl_mask_table[];
Expand All @@ -179,7 +210,6 @@ extern u32 g_rtt_nom;
extern u32 g_rtt_wr;
extern u32 g_rtt_park;

extern u8 debug_training_access;
extern u32 first_active_if;
extern u32 delay_enable, ck_delay, ca_delay;
extern u32 mask_tune_func;
Expand Down Expand Up @@ -219,15 +249,12 @@ extern u32 clamp_tbl[];
extern u32 freq_mask[MAX_DEVICE_NUM][MV_DDR_FREQ_LAST];

extern u32 maxt_poll_tries;
extern u32 is_bist_reset_bit;

extern u8 vref_window_size[MAX_INTERFACE_NUM][MAX_BUS_NUM];
extern u32 effective_cs;
extern int ddr3_tip_centr_skip_min_win_check;
extern u32 *dq_map_table;

extern u8 debug_training_hw_alg;

extern u32 start_xsb_offset;
extern u32 odt_config;

Expand Down