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Extend ASV tests with QASM3 dump #13334

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merged 3 commits into from
Nov 21, 2024
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@1ucian0 1ucian0 commented Oct 16, 2024

Summary

Inspired by the performance regression fixed in #13327 , a benchmark test for QASM3 dumper.

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@jakelishman jakelishman left a comment

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Fwiw, I don't think we #13327 fixed the perf regression that triggered me to open that PR, but it's still worthwhile.

Could you add an additional tests: one that defines a couple of entirely custom gates (at least one parametric and one non-parametric) and uses the same gate several times in the input circuit?

There's more other cases that I'm considering as well, but they're sufficiently esoteric that they're probably not worth encoding into ASV benchmarks (the speed of the dump after a round-trip through OQ2/OQ3/QPY, for example, especially for those that cause the loader to output non-standard gates). Actually, maybe the dump after a QPY round-trip is reasonable, since that's a situation that's actually a lot more likely to come up.

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coveralls commented Oct 16, 2024

Pull Request Test Coverage Report for Build 11954744748

Details

  • 0 of 0 changed or added relevant lines in 0 files are covered.
  • 25 unchanged lines in 4 files lost coverage.
  • Overall coverage decreased (-0.02%) to 88.926%

Files with Coverage Reduction New Missed Lines %
crates/accelerate/src/two_qubit_decompose.rs 1 92.13%
crates/accelerate/src/unitary_synthesis.rs 1 92.2%
crates/qasm2/src/lex.rs 5 91.73%
crates/qasm2/src/parse.rs 18 96.69%
Totals Coverage Status
Change from base Build 11944955850: -0.02%
Covered Lines: 79396
Relevant Lines: 89283

💛 - Coveralls

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1ucian0 commented Oct 17, 2024

Could you add an additional tests: one that defines a couple of entirely custom gates (at least one parametric and one non-parametric) and uses the same gate several times in the input circuit?

Done in 1443081

@1ucian0 1ucian0 marked this pull request as ready for review October 17, 2024 06:52
@1ucian0 1ucian0 requested a review from a team as a code owner October 17, 2024 06:52
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One or more of the following people are relevant to this code:

  • @Qiskit/terra-core

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@mtreinish mtreinish left a comment

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This LGTM, this will be good coverage to get. I left an inline comment about a potential change in the benchmark version for the basis_gate update. Other than that do you have example output on how long these take now. So we get a feeling for how much time we're adding per commit to a benchmark run?

@@ -35,7 +35,7 @@ def setup(self, n_qubits, depth):
n_qubits, depth, measure=True, conditional=True, reset=True, seed=seed, max_operands=2
)
self.fresh_dag = circuit_to_dag(self.circuit)
self.basis_gates = ["u1", "u2", "u3", "cx", "iid"]
self.basis_gates = ["u1", "u2", "u3", "cx", "id"]
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This is clearly correct, but I think this might invalidate the results because it changes the hash of the code and asv will treat this as a new version. So I think we should fix it, but lets wait to merge this until after 1.3.0rc1 is tagged so we don't interfere with the collected data

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ping, 1.3.0rc1 is out.

@mtreinish mtreinish added this pull request to the merge queue Nov 21, 2024
Merged via the queue into Qiskit:main with commit 5f3f594 Nov 21, 2024
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5 participants