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Fix translation bug: The old code really checks for the presense of a…
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… node, not an edge in glift and flatten.

Add back statement that inserts nodes in order in opt_expr.cc.
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rmlarsen committed Oct 6, 2023
1 parent fd7bd42 commit 0a37c2a
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Showing 4 changed files with 4 additions and 9 deletions.
8 changes: 1 addition & 7 deletions kernel/utils.h
Original file line number Diff line number Diff line change
Expand Up @@ -174,11 +174,7 @@ template <typename T, typename C = std::less<T>, typename OPS = hash_ops<T>> cla

void edge(T left, T right) { edge(node(left), node(right)); }

bool has_edges(const T &node)
{
auto it = node_to_index.find(node);
return it == node_to_index.end() || !edges[it->second].empty();
}
bool has_node(const T &node) { return node_to_index.find(node) != node_to_index.end(); }

bool sort()
{
Expand All @@ -192,8 +188,6 @@ template <typename T, typename C = std::less<T>, typename OPS = hash_ops<T>> cla
std::vector<bool> marked_cells(edges.size(), false);
std::vector<bool> active_cells(edges.size(), false);
std::vector<int> active_stack;

marked_cells.reserve(edges.size());
sorted.reserve(edges.size());

for (const auto &it : node_to_index)
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2 changes: 1 addition & 1 deletion passes/cmds/glift.cc
Original file line number Diff line number Diff line change
Expand Up @@ -582,7 +582,7 @@ struct GliftPass : public Pass {
for (auto cell : module->selected_cells()) {
RTLIL::Module *tpl = design->module(cell->type);
if (tpl != nullptr) {
if (!topo_modules.has_edges(tpl))
if (!topo_modules.has_node(tpl))
worklist.push_back(tpl);
topo_modules.edge(tpl, module);
non_top_modules.insert(cell->type);
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1 change: 1 addition & 0 deletions passes/opt/opt_expr.cc
Original file line number Diff line number Diff line change
Expand Up @@ -424,6 +424,7 @@ void replace_const_cells(RTLIL::Design *design, RTLIL::Module *module, bool cons
for (auto &bit : sig)
outbit_to_cell[bit].insert(cell);
}
cells.node(cell);
}

// Build the graph for the topological sort.
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2 changes: 1 addition & 1 deletion passes/techmap/flatten.cc
Original file line number Diff line number Diff line change
Expand Up @@ -312,7 +312,7 @@ struct FlattenPass : public Pass {
for (auto cell : module->selected_cells()) {
RTLIL::Module *tpl = design->module(cell->type);
if (tpl != nullptr) {
if (!topo_modules.has_edges(tpl))
if (!topo_modules.has_node(tpl))
worklist.insert(tpl);
topo_modules.edge(tpl, module);
}
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