Code review fixes

YosysHQ · Dec 20, 2024 · 4055111 · 4055111
1 parent 700920c
commit 4055111
Showing 1 changed file with 10 additions and 9 deletions.
diff --git a/passes/cmds/splitfanout.cc b/passes/cmds/splitfanout.cc
@@ -33,15 +33,16 @@ struct SplitfanoutWorker
 	dict<SigBit, pool<tuple<IdString,IdString,int>>> bit_users_db;
 	TopoSort<IdString, RTLIL::sort_by_id_str> toposort;
 
+	// This worker is very similar to that of splitcells.cc (except for toposort stuff)
 	SplitfanoutWorker(Module *module) : module(module), sigmap(module)
 	{
 		// Add nodes to topological sorter for all selected cells
-		log("Making toposort nodes for module %s...\n", log_id(module));
+		log_debug("Making toposort nodes for module %s...\n", log_id(module));
 		for (auto cell : module->selected_cells())
 			toposort.node(cell->name);
 
 		// Build bit_drivers_db
-		log("Building bit_drivers_db...\n");
+		log_debug("Building bit_drivers_db...\n");
 		for (auto cell : module->cells()) {
 			for (auto conn : cell->connections()) {
 				if (!cell->output(conn.first)) continue;
@@ -53,7 +54,7 @@ struct SplitfanoutWorker
 		}
 
 		// Build bit_users_db and add edges to topological sorter
-		log("Building bit_users_db and adding edges to toposort...\n");
+		log_debug("Building bit_users_db and adding edges to toposort...\n");
 		for (auto cell : module->cells()) {
 			for (auto conn : cell->connections()) {
 				if (!cell->input(conn.first)) continue;
@@ -71,7 +72,7 @@ struct SplitfanoutWorker
 		}
 
 		// Build bit_users_db for output ports
-		log("Building bit_users_db for output ports...\n");
+		log_debug("Building bit_users_db for output ports...\n");
 		for (auto wire : module->wires()) {
 			if (!wire->port_output) continue;
 			SigSpec sig(sigmap(wire));
@@ -84,7 +85,7 @@ struct SplitfanoutWorker
 		}
 
 		// Sort using the topological sorter
-		log("Sorting using toposort...\n");
+		log_debug("Sorting using toposort...\n");
 		toposort.analyze_loops = false;
 		toposort.sort();
 	}
@@ -102,15 +103,15 @@ struct SplitfanoutWorker
 				outsig = conn.second;
 			}
 		if (output_count != 1) {
-			log("Skipping %s cell %s/%s with %d output ports.\n", log_id(cell->type), log_id(module), log_id(cell), output_count);
+			log_debug("Skipping %s cell %s/%s with %d output ports.\n", log_id(cell->type), log_id(module), log_id(cell), output_count);
 			return 0;
 		}
 
 		// Check if output signal is "bit-split", skip if so
 		auto bit_users = bit_users_db[outsig[0]];
 		for (int i = 0; i < GetSize(outsig); i++) {
 			if (bit_users_db[outsig[i]] != bit_users) {
-				log("Skipping %s cell %s/%s with bit-split output.\n", log_id(cell->type), log_id(module), log_id(cell));
+				log_debug("Skipping %s cell %s/%s with bit-split output.\n", log_id(cell->type), log_id(module), log_id(cell));
 				return 0;
 			}
 		}
@@ -121,12 +122,12 @@ struct SplitfanoutWorker
 
 		// Skip if fanout is above limit
 		if (limit != -1 && GetSize(bit_users) > limit) {
-			log("Skipping %s cell %s/%s with high fanout %d.\n", log_id(cell->type), log_id(module), log_id(cell), GetSize(bit_users)-1);
+			log_debug("Skipping %s cell %s/%s with high fanout %d.\n", log_id(cell->type), log_id(module), log_id(cell), GetSize(bit_users)-1);
 			return 0;
 		}
 
 		// Iterate over bit users and create a new cell for each one
-		log("Splitting %s cell %s/%s into %d copies based on fanout\n", log_id(cell->type), log_id(module), log_id(cell), GetSize(bit_users)-1);
+		log_debug("Splitting %s cell %s/%s into %d copies based on fanout\n", log_id(cell->type), log_id(module), log_id(cell), GetSize(bit_users)-1);
 		int foi = 0;
 		cell->unsetPort(outport);
 		int num_new_cells = GetSize(bit_users)-1;