Merge pull request #3984 from YosysHQ/module_hdlname

verific: save original module name
YosysHQ · Oct 5, 2023 · a54e6f2 · a54e6f2
2 parents 6b8203f + 268fe92
commit a54e6f2
Showing 1 changed file with 1 addition and 0 deletions.
diff --git a/frontends/verific/verific.cc b/frontends/verific/verific.cc
@@ -1275,6 +1275,7 @@ void VerificImporter::import_netlist(RTLIL::Design *design, Netlist *nl, std::ma
 		log("Importing module %s.\n", RTLIL::id2cstr(module->name));
 	}
 	import_attributes(module->attributes, nl, nl);
+	module->set_string_attribute(ID::hdlname, nl->CellBaseName());
 	const char *param_name ;
 	const char *param_value ;
 	MapIter mi;