Skip to content

Commit

Permalink
equiv_simple: Do not special-case flip-flop types in cone expansion
Browse files Browse the repository at this point in the history
If there's an asynchronous flip-flop type, it will be caught by not
having a synchronous SAT model later on. Otherwise we can support all
flip-flops.
  • Loading branch information
povik committed Oct 2, 2023
1 parent 7d16264 commit f918abf
Showing 1 changed file with 1 addition and 1 deletion.
2 changes: 1 addition & 1 deletion passes/equiv/equiv_simple.cc
Original file line number Diff line number Diff line change
Expand Up @@ -60,7 +60,7 @@ struct EquivSimpleWorker
for (auto &conn : cell->connections())
if (yosys_celltypes.cell_input(cell->type, conn.first))
for (auto bit : sigmap(conn.second)) {
if (cell->type.in(ID($dff), ID($_DFF_P_), ID($_DFF_N_), ID($ff), ID($_FF_))) {
if (RTLIL::builtin_ff_cell_types().count(cell->type)) {
if (!conn.first.in(ID::CLK, ID::C))
next_seed.insert(bit);
} else
Expand Down

0 comments on commit f918abf

Please sign in to comment.