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sim: Add -noinitstate option and handle non-cosim initstate #3962

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Oct 2, 2023
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sim: Add -noinitstate option and handle non-cosim initstate #3962

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15 changes: 14 additions & 1 deletion passes/sat/sim.cc
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Original file line number Diff line number Diff line change
Expand Up @@ -111,6 +111,7 @@ struct SimShared
int step = 0;
std::vector<TriggeredAssertion> triggered_assertions;
bool serious_asserts = false;
bool initstate = true;
};

void zinit(State &v)
Expand Down Expand Up @@ -1356,6 +1357,8 @@ struct SimWorker : SimShared
set_inports(clock, State::Sx);
set_inports(clockn, State::Sx);

top->set_initstate_outputs(initstate ? State::S1 : State::S0);

update(false);

register_output_step(0);
Expand All @@ -1372,6 +1375,9 @@ struct SimWorker : SimShared
update(true);
register_output_step(10*cycle + 5);

if (cycle == 0)
top->set_initstate_outputs(State::S0);

if (debug)
log("\n===== %d =====\n", 10*cycle + 10);
else if (verbose)
Expand Down Expand Up @@ -1953,7 +1959,7 @@ struct SimWorker : SimShared
if (yw.steps.empty()) {
log_warning("Yosys witness file `%s` contains no time steps\n", yw.filename.c_str());
} else {
top->set_initstate_outputs(State::S1);
top->set_initstate_outputs(initstate ? State::S1 : State::S0);
set_yw_state(yw, hierarchy, 0);
set_yw_clocks(yw, hierarchy, true);
initialize_stable_past();
Expand Down Expand Up @@ -2546,6 +2552,9 @@ struct SimPass : public Pass {
log(" -n <integer>\n");
log(" number of clock cycles to simulate (default: 20)\n");
log("\n");
log(" -noinitstate\n");
log(" do not activate $initstate cells during the first cycle\n");
log("\n");
log(" -a\n");
log(" use all nets in VCD/FST operations, not just those with public names\n");
log("\n");
Expand Down Expand Up @@ -2646,6 +2655,10 @@ struct SimPass : public Pass {
worker.cycles_set = true;
continue;
}
if (args[argidx] == "-noinitstate") {
worker.initstate = false;
continue;
}
if (args[argidx] == "-rstlen" && argidx+1 < args.size()) {
worker.rstlen = atoi(args[++argidx].c_str());
continue;
Expand Down