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gowin: add mux techmap and whitebox #4004

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gowin: add mux techmap and whitebox #4004

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35 changes: 35 additions & 0 deletions techlibs/gowin/cells_map.v
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Original file line number Diff line number Diff line change
Expand Up @@ -175,3 +175,38 @@ module \$lut (A, Y);
end
endgenerate
endmodule

module \$_MUX4_ (A, B, C, D, S, T, Y);
input A, B, C, D, S, T;
output Y;

wire AB;
wire CD;

LUT3 #(.INIT(8'b11011000)) ab(.F(AB), .I0(S), .I1(B), .I2(A));
LUT3 #(.INIT(8'b11011000)) cd(.F(CD), .I0(S), .I1(D), .I2(C));
MUX2_LUT5 y(.O(Y), .I0(AB), .I1(CD), .S0(T));
endmodule

module \$_MUX8_ (A, B, C, D, E, F, G, H, S, T, U, Y);
input A, B, C, D, E, F, G, H, S, T, U;
output Y;

wire AB;
wire CD;
wire EF;
wire GH;

wire ABCD;
wire EFGH;

LUT3 #(.INIT(8'b11011000)) ab(.F(AB), .I0(S), .I1(B), .I2(A));
LUT3 #(.INIT(8'b11011000)) cd(.F(CD), .I0(S), .I1(D), .I2(C));
LUT3 #(.INIT(8'b11011000)) ef(.F(EF), .I0(S), .I1(F), .I2(E));
LUT3 #(.INIT(8'b11011000)) gh(.F(GH), .I0(S), .I1(H), .I2(G));

MUX2_LUT5 abcd(.O(ABCD), .I0(AB), .I1(CD), .S0(T));
MUX2_LUT5 efgh(.O(EFGH), .I0(EF), .I1(GH), .S0(T));

MUX2_LUT6 y(.O(Y), .I0(ABCD), .I1(EFGH), .S0(U));
endmodule
39 changes: 39 additions & 0 deletions techlibs/gowin/cells_sim.v
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Expand Up @@ -110,6 +110,45 @@ module MUX2 (O, I0, I1, S0);
assign O = S0 ? I1 : I0;
endmodule

(* abc9_box, lib_whitebox *)
module \$_MUX4_ (A, B, C, D, S, T, Y);
input A, B, C, D, S, T;
output Y;
specify
(A => Y) = (808, 1116);
(B => Y) = (995, 1371);
(C => Y) = (808, 1116);
(D => Y) = (995, 1371);
(S => Y) = (1184, 1638);
(T => Y) = (486, 680);
endspecify
assign Y = T ? (S ? D : C) :
(S ? B : A);
endmodule

(* abc9_box, lib_whitebox *)
module \$_MUX8_ (A, B, C, D, E, F, G, H, S, T, U, Y);
input A, B, C, D, E, F, G, H, S, T, U;
output Y;
specify
(A => Y) = (808 + 136, 1116 + 255);
(B => Y) = (995 + 136, 1371 + 255);
(C => Y) = (808 + 136, 1116 + 255);
(D => Y) = (995 + 136, 1371 + 255);
(E => Y) = (808 + 136, 1116 + 255);
(F => Y) = (995 + 136, 1371 + 255);
(G => Y) = (808 + 136, 1116 + 255);
(H => Y) = (995 + 136, 1371 + 255);
(S => Y) = (1184 + 136, 1638 + 255);
(T => Y) = (486 + 136, 680 + 255);
(U => Y) = (478, 723);
endspecify
assign Y = U ? T ? (S ? H : G) :
(S ? F : E) :
T ? (S ? D : C) :
(S ? B : A);
endmodule

module MUX2_LUT5 (O, I0, I1, S0);
input I0,I1;
input S0;
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