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write_verilog: only warn on processes with sync rules #4310

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merged 1 commit into from
Apr 2, 2024

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Processes without sync rules correspond to simple decision trees that directly correspond to always @* or always_comb blocks in Verilog, and do not need a warning.

This removes the need to suppress warnings during the RTLIL-to-Verilog conversion performed by Amaranth.

@whitequark whitequark requested a review from mwkmwkmwk April 2, 2024 11:34
Processes without sync rules correspond to simple decision trees that
directly correspond to `always @*` or `always_comb` blocks in Verilog,
and do not need a warning.

This removes the need to suppress warnings during the RTLIL-to-Verilog
conversion performed by Amaranth.
@whitequark whitequark force-pushed the verilog-warn-on-sync-rules branch from 5cf177d to 46c7043 Compare April 2, 2024 11:54
@whitequark whitequark merged commit cb07710 into YosysHQ:main Apr 2, 2024
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@whitequark whitequark deleted the verilog-warn-on-sync-rules branch April 2, 2024 13:48
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2 participants