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Got the DUT working (: #723

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Got the DUT working (: #723

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@rslawson rslawson commented Feb 24, 2025 •
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Okay so maybe this commit is a bit more than that. Here's a list of the things that changed:

  • Vivado logging directory is now configurable in the CI file. Currently, this is set to _build/hitl/. Moved to Allow setting of the Vivado logging directory #725
  • Remove set -x from the OpenOCD start script, which I introduced in the head commit of the original demo DUT branch.
  • Fixes to the TCL file for OpenOCD. Why do these fixes make it work? Great question.
  • Fixes to the demo DUT. This includes:
    • Adding a whoami Circuit that allows reporting of a 32 bit identifier over Wishbone.
    • Adding a debugging ILA to both the DUT and testing wrapper.
    • Changing the reset on the FINC/FDEC pulse shaper to be on all the probe_all_programmed signal.
    • Adjusting the reduction of the FIFO overflow/underflow signals from and to or.
    • Changing noFifoOverflows and noFifoUnderflows to fifoOverflows and fifoUnderflows respectively, and adjusting their usage in the test wrapper.
  • Changes to the demo DUT driver. This includes:
    • Deasserting probe_all_programmed in the case that more test cases are added later. This will prevent any issues from occurring should that happen, otherwise it's harmless.
    • Actually asserting probe_all_programmed once all devices are programmed.
    • Setting longer timeouts for OpenOCD and GDB to terminate.
    • Adding in device ID checks using GDB memory inspection of the new whoami Wishbone components.
    • Actually starting the clock control program on all devices.
  • Added a setTimeout function to our GDB utility file. Moved to Add wrapper function around the set timeout GDB command. #726
  • Added a catch to running the driver function in Shake, allowing execution to continue to downloading the ILA data. Moved to Add a catch to the driver function to allow ILA data to be downloaded. #727

@rslawson rslawson force-pushed the rs/demo-dut branch 2 times, most recently from ca60e74 to 3458129 Compare February 25, 2025 13:21
@rslawson
Switch demo processing element test was missing includeIlaWb field.
f25e566
@rslawson
Merge pull request #724 from bittide/rs/switch-includeIlaWb
58db2bd 
Use `includeIlaWb` field in switch demo processing element test
@rslawson
fixup! Add demo DUT.
e7c9948
@rslawson
Big commit, see full commit message for details.
67a6502 
Okay, so a lot of things happened with this one. Let's start with the changes to
the demo driver function.

- I've reordered the function definitions in the big `let` to better reflect the
  order they're initially used in.
- I've added in a function to deassert `probe_all_programmed`. Currently this is
  not necessary, however, if in the future more test cases are added to be run
  on this DUT, `probe_all_programmed` must be deasserted between each of them.
  However since the post function was removed from the HITL infra, the only way
  to do this currently is to make sure that the probe is deasserted before
  anything else happens in the driver function.
- Unnecessary dumps of stdout/stderr of various handles were removed. These
  were only there from earlier debugging attempts and are no longer necessary.
- Timeouts on cleanup for GDB and OpenOCD were extended from 5s to 10s.
- GDB stdout is set to line buffering on our side. Hopefully GDB also does this.
- Added in a whoami check to ensure that each of the CPUs reports its identity
  and that that report is what it should be.
- THE TEST START PROBE IS ACTUALLY ASSERTED NOW, HOW ON EARTH DID I FORGET TO
  DO THIS PREVIOUSLY
- `probe_all_programmed` is asserted.

In `bittide/src/Bittide/Wishbone.hs`:

- Added `wbAlwaysAckWith` and `whoAmIC`. The second one uses the first in order
  to report back a 4 byte identifier whenever accessed over the Wishbone bus.

In `bittide-instances/src/Bittide/Instances/Hitl/Demo.hs`:

- Each component was given a unique address in the management unit processing
  element config, and a `whoAmIC` component was added.
- `whoAmIC` component added to SwCc at the same address as in the management
  unit.
- A debug ILA was added to both the DUT and test top entity.
- Naming and definitions of the FIFO overflow/underflow signals were changed.
  Previously they would only ever assert `True` if ALL FIFOs overflowed or
  underflowed, now they will assert if ANY do. Furthermore, in the test top
  entity they were used as `noFifoOverflows`/`noFifoUnderflows` without actually
  inverting the signals, so that was fixed.

In `firmware-binaries/management-unit/memory.x`:

- The address of data memory was changed to reflect the updated PE config.

In `bittide-instances/data/openocd/vexriscv-2chain.tcl`:

                                                                               |
- Added back in the environment variable grabbing for the TCL and telnet ports.
- Updated target definitions so that they use ports in the opposite order as
  JTAG taps. Why do the taps and ports go in the opposite order that I expected?
  Excellent question, and I don't even have the beginnings of an answer to it.
@rslawson rslawson force-pushed the rs/demo-dut branch 2 times, most recently from a25fd9d to 5b0c13d Compare February 26, 2025 10:57
@rslawson rslawson force-pushed the rs/demo-dut branch 5 times, most recently from bd103fc to 7e9c28b Compare February 27, 2025 14:30
@rslawson rslawson force-pushed the rs/demo-dut branch 5 times, most recently from 14147b5 to f1ba04a Compare February 27, 2025 18:15
@rslawson rslawson force-pushed the rs/demo-dut branch 4 times, most recently from 1cdb9f0 to 67d42e9 Compare February 28, 2025 16:56
@hiddemoll hiddemoll mentioned this pull request Mar 3, 2025
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@rslawson @martijnbastiaan @leonschoorl