multi-dimension bugs in elab

chipsalliance · Aug 19, 2023 · 4b97d40 · 4b97d40
1 parent ab0b1d1
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Showing 2 changed files with 10 additions and 16 deletions.
diff --git a/third_party/tests/rggen/Rggen.log b/third_party/tests/rggen/Rggen.log
@@ -9004,7 +9004,7 @@ array_typespec                                       203
 array_var                                            137
 assign_stmt                                           42
 assignment                                           726
-begin                                                991
+begin                                                990
 bit_select                                          5350
 bit_typespec                                        3290
 bit_var                                                8
@@ -9028,13 +9028,11 @@ gen_if_else                                           13
 gen_region                                            29
 gen_scope                                           8816
 gen_scope_array                                     8816
-hier_path                                           8123
+hier_path                                           8122
 if_else                                              296
 if_stmt                                              264
-immediate_assume                                       1
 import_typespec                                       12
 indexed_part_select                                 1186
-initial                                                1
 int_typespec                                        7662
 int_var                                               28
 integer_typespec                                     141
@@ -9050,15 +9048,15 @@ module_array                                           3
 module_inst                                         4028
 module_typespec                                        3
 named_begin                                          127
-operation                                          34103
+operation                                          34102
 package                                                4
 param_assign                                       11870
 parameter                                          14039
 part_select                                          184
 port                                                9957
 range                                              21032
 ref_module                                           861
-ref_obj                                            32974
+ref_obj                                            32971
 return_stmt                                           20
 sys_func_call                                          2
 task                                                   9
@@ -9074,7 +9072,7 @@ array_typespec                                       203
 array_var                                           4895
 assign_stmt                                          590
 assignment                                         29251
-begin                                              15961
+begin                                              15959
 bit_select                                         48633
 bit_typespec                                        3360
 bit_var                                             1448
@@ -9098,13 +9096,11 @@ gen_if_else                                           13
 gen_region                                            29
 gen_scope                                          16726
 gen_scope_array                                    16726
-hier_path                                          21590
+hier_path                                          21588
 if_else                                             4726
 if_stmt                                             1050
-immediate_assume                                       2
 import_typespec                                       12
 indexed_part_select                                 2325
-initial                                                2
 int_typespec                                        7697
 int_var                                              908
 integer_typespec                                     141
@@ -9120,28 +9116,26 @@ module_array                                           3
 module_inst                                         4623
 module_typespec                                        3
 named_begin                                          127
-operation                                          92618
+operation                                          92616
 package                                                4
 param_assign                                       19697
 parameter                                          14649
 part_select                                         2510
 port                                               24314
 range                                              29403
 ref_module                                           861
-ref_obj                                           192200
+ref_obj                                           192194
 return_stmt                                         7523
 sys_func_call                                          2
 task                                                  18
 unsupported_typespec                                   1
 var_select                                          2484
 while_stmt                                            84
 === UHDM Object Stats End ===
-[ERR:UH0725] ${SURELOG_DIR}/third_party/tests/rggen/rggen-sv-rtl/rggen_apb_bridge.sv:13:30: Unresolved hierarchical reference "apb_if.ADDRESS_WIDTH".
-
 [INF:UH0708] Writing UHDM DB: ${SURELOG_DIR}/build/regression/Rggen/slpp_all/surelog.uhdm ...
 
 [  FATAL] : 0
 [ SYNTAX] : 0
-[  ERROR] : 1
+[  ERROR] : 0
 [WARNING] : 20
 [   NOTE] : 5
diff --git a/third_party/tests/rggen/Rggen.sl b/third_party/tests/rggen/Rggen.sl
@@ -1 +1 @@
--elabuhdm  -nopython -parse -verbose --top-module rggen -Itests/generated/rggen rggen-sv-rtl/rggen_rtl_pkg.sv rggen-sv-rtl/rggen_or_reducer.sv rggen-sv-rtl/rggen_mux.sv rggen-sv-rtl/rggen_bit_field_if.sv rggen-sv-rtl/rggen_bit_field.sv rggen-sv-rtl/rggen_bit_field_w01trg.sv rggen-sv-rtl/rggen_register_if.sv rggen-sv-rtl/rggen_address_decoder.sv rggen-sv-rtl/rggen_register_common.sv rggen-sv-rtl/rggen_default_register.sv rggen-sv-rtl/rggen_external_register.sv rggen-sv-rtl/rggen_indirect_register.sv rggen-sv-rtl/rggen_bus_if.sv rggen-sv-rtl/rggen_adapter_common.sv rggen-sv-rtl/rggen_apb_if.sv rggen-sv-rtl/rggen_apb_adapter.sv rggen-sv-rtl/rggen_apb_bridge.sv rggen-sample/block_0.sv rggen-sample/block_1.sv tests/generated/rggen/rggen.sv
+-elabuhdm  -DSYNTHESIS=1 -nopython -parse -verbose --top-module rggen -Itests/generated/rggen rggen-sv-rtl/rggen_rtl_pkg.sv rggen-sv-rtl/rggen_or_reducer.sv rggen-sv-rtl/rggen_mux.sv rggen-sv-rtl/rggen_bit_field_if.sv rggen-sv-rtl/rggen_bit_field.sv rggen-sv-rtl/rggen_bit_field_w01trg.sv rggen-sv-rtl/rggen_register_if.sv rggen-sv-rtl/rggen_address_decoder.sv rggen-sv-rtl/rggen_register_common.sv rggen-sv-rtl/rggen_default_register.sv rggen-sv-rtl/rggen_external_register.sv rggen-sv-rtl/rggen_indirect_register.sv rggen-sv-rtl/rggen_bus_if.sv rggen-sv-rtl/rggen_adapter_common.sv rggen-sv-rtl/rggen_apb_if.sv rggen-sv-rtl/rggen_apb_adapter.sv rggen-sv-rtl/rggen_apb_bridge.sv rggen-sample/block_0.sv rggen-sample/block_1.sv tests/generated/rggen/rggen.sv