feat: add CIRCTSRAMInterface · chipsalliance/chisel@ded35ec

Triggered via pull request November 20, 2024 07:52

unlsycn

synchronize #4494

unlsycn:circt-sram

Status Success

Total duration 21m 43s

Artifacts 2

ci.yml

on: pull_request

Matrix: ci

Produced during runtime

Name	Size
chisel-example.scala Expired	730 Bytes
website	8.92 MB