hotfix: flatten while generating JSON headers (#458)

## Steps
* `Odb.SetPowerConnections`
* Fixed bug where instances with special characters in their name and
power
    pins are not equal to those of the SCL would not get connected.
* Added assertion that exactly one pin is connected for every operation.

* `Yosys.GenerateJSONHeader`
* Netlist is now flattened so `Odb.SetPowerConnections` can properly set
pins
for nested macros with power pin names not equal to those of the SCL.

## Testing

* `test/designs/dual_spm`
* SPM macro now hardened with pin names `power`, `ground` (as to not
match the standard cell pin names)
* Dual SPM now nests the macros in a thin wrapper to test that the SPM
macro will get its power pins connected properly.

Co-authored-by: Mohamed Gaber <[email protected]>

Changelog.md

@@ -13,6 +13,17 @@
 ## API Breaks
 ## Documentation
 -->
+# 2.0.4
+
+## Steps
+* `Odb.SetPowerConnections`
+  * Fixed bug where instances with special characters in their name and power
+    pins are not equal to those of the SCL would not get connected.
+  * Added assertion that exactly one pin is connected for every operation.
+
+* `Yosys.GenerateJSONHeader`
+  * Netlist is now flattened so `Odb.SetPowerConnections` can properly set pins
+    for nested macros with power pin names not equal to those of the SCL.
 
 # 2.0.3
 

openlane/__version__.py

@@ -11,7 +11,7 @@
 # WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
 # See the License for the specific language governing permissions and
 # limitations under the License.
-__version__ = "2.0.3"
+__version__ = "2.0.4"
 
 if __name__ == "__main__":
     print(__version__, end="")

openlane/scripts/odbpy/power_utils.py

@@ -50,7 +50,7 @@
 
 import re
 import json
-from typing import List
+from typing import List, Optional
 from collections import namedtuple
 
 from reader import OdbReader, click_odb, click
@@ -183,32 +183,13 @@ def extract_instances(
     def add_global_connection(
         design,
         *,
-        net_name=None,
-        inst_pattern=None,
-        pin_pattern=None,
-        power=False,
-        ground=False,
-        region=None,
+        net_name: str,
+        inst_name: str,
+        pin_name: str,
+        power: bool = False,
+        ground: bool = False,
+        region: Optional[odb.dbRegion] = None,
     ):
-        if net_name is None:
-            utl.error(
-                utl.PDN,
-                1501,
-                "The net option for the "
-                + "add_global_connection command is required.",
-            )
-
-        if inst_pattern is None:
-            inst_pattern = ".*"
-
-        if pin_pattern is None:
-            utl.error(
-                utl.PDN,
-                1502,
-                "The pin_pattern option for the "
-                + "add_global_connection command is required.",
-            )
-
         net = design.getBlock().findNet(net_name)
         if net is None:
             net = odb.dbNet_create(design.getBlock(), net_name)
@@ -226,8 +207,34 @@ def add_global_connection(
             region = design.getBlock().findRegion(region)
             if region is None:
                 utl.error(utl.PDN, 1504, f"Region {region} not defined")
+                exit(-1)
+
+        inst_def_name = reader.escape_verilog_name(inst_name)
+        pin_def_name = reader.escape_verilog_name(pin_name)
+
+        for term in net.getITerms():
+            if (
+                term.getInst().getName() == inst_def_name
+                and term.getMTerm().getName() == pin_def_name
+            ):
+                print(f"{inst_name}/{pin_name} is already connected to {net.getName()}")
+                return
+
+        connected_items = design.getBlock().addGlobalConnect(
+            region,
+            re.escape(inst_def_name),
+            re.escape(pin_def_name),
+            net,
+            True,
+        )
+        print(f"Made {connected_items} connections.")
 
-        design.getBlock().addGlobalConnect(region, inst_pattern, pin_pattern, net, True)
+        assert (
+            connected_items != 0
+        ), f"Global connect failed to make any connections for '{inst_name}/{pin_name}' to {net_name}"
+        assert (
+            connected_items == 1
+        ), f"Global connect somehow made multiple connections for '{inst_name}/{pin_name}' to {net_name} -- please report this as a bug"
 
     design_str = open(input_json).read()
     design_dict = json.loads(design_str)
@@ -243,19 +250,19 @@ def add_global_connection(
             print(f"Connecting power net {net_name} to {instance.name}/{pin}…")
             add_global_connection(
                 design=chip,
-                inst_pattern=re.escape(instance.name),
+                inst_name=instance.name,
                 net_name=net_name,
-                pin_pattern=pin,
+                pin_name=pin,
                 power=True,
             )
         for pin in instance.ground_connections.keys():
             net_name = instance.ground_connections[pin]
             print(f"Connecting ground net {net_name} to {instance.name}/{pin}…")
             add_global_connection(
                 design=chip,
-                inst_pattern=re.escape(instance.name),
+                inst_name=instance.name,
                 net_name=net_name,
-                pin_pattern=pin,
+                pin_name=pin,
                 ground=True,
             )
 

openlane/scripts/yosys/json_header.tcl

@@ -20,4 +20,6 @@ yosys_ol::read_verilog_files $::env(DESIGN_NAME)
 hierarchy -check -top $::env(DESIGN_NAME) -nokeep_prints -nokeep_asserts
 yosys rename -top $::env(DESIGN_NAME)
 yosys proc
+flatten
+opt_clean -purge
 json -o $::env(SAVE_JSON_HEADER)