Skip to content
New issue

Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.

By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.

Already on GitHub? Sign in to your account

feat: expand synthesis options, initial state elements in cli #604

Merged
merged 18 commits into from
Dec 16, 2024
Merged
Changes from 1 commit
Commits
File filter

Filter by extension

Filter by extension

Conversations
Failed to load comments.
Loading
Jump to
Jump to file
Failed to load files.
Loading
Diff view
Diff view
Prev Previous commit
Next Next commit
unpack opt pass for consistency without -full being passed
  • Loading branch information
donn committed Dec 15, 2024
commit 2a9bf55c2e80882e078852b8cc2abcb44b199035
135 changes: 111 additions & 24 deletions openlane/scripts/pyosys/synthesize.py
Original file line number Diff line number Diff line change
Expand Up @@ -12,7 +12,10 @@
# See the License for the specific language governing permissions and
# limitations under the License.

# Parts of this file adapted from https://github.com/YosysHQ/yosys/blob/master/techlibs/common/synth.cc
# Parts of this file adapted from:
#
# * https://github.com/YosysHQ/yosys/blob/master/techlibs/common/synth.cc
# * https://github.com/YosysHQ/yosys/blob/master/passes/opt/opt.cc
#
# Copyright (C) 2012 Claire Xenia Wolf <claire@yosyshq.com>
#
Expand Down Expand Up @@ -57,6 +60,88 @@ def openlane_proc(d: ys.Design, report_dir: str):
d.run_pass("opt_expr") # Optimize expressions


def openlane_opt(
d,
fast=False,
mux_undef=False,
mux_bool=False,
undriven=False,
fine=False,
purge=False,
noclkinv=False,
keepdc=False,
share_all=False,
nodffe=False,
nosdff=False,
sat=False,
opt_share=False,
noff=False,
):
expr_args = []
merge_args = []
reduce_args = []
clean_args = []
dff_args = []
if purge:
clean_args.append("-purge")
if mux_undef:
expr_args.append("-mux_undef")
if mux_bool:
expr_args.append("-mux_bool")
if undriven:
expr_args.append("-undriven")
if fine:
expr_args.append("-fine")
reduce_args.append("-fine")
if noclkinv:
expr_args.append("-noclkinv")
if keepdc:
expr_args.append("-keepdc")
dff_args.append("-keepdc")
merge_args.append("-keepdc")
if nodffe:
dff_args.append("-nodffe")
if nosdff:
dff_args.append("-nosdff")
if sat:
dff_args.append("-sat")
if share_all:
merge_args.append("-share_all")
if fast:
while True:
d.run_pass("opt_expr", *expr_args)
d.run_pass("opt_merge", *merge_args)
d.scratchpad_unset("opt.did_something")
if not noff:
d.run_pass("opt_dff", *dff_args)
if not d.scratchpad_get_bool("opt.did_something"):
break
d.run_pass("opt_clean", *clean_args)
ys.log_header(d, "Rerunning OPT passes (Removed registers in this run.)")
d.run_pass("opt_clean", *clean_args)
else:
d.run_pass("opt_expr", *expr_args)
d.run_pass("opt_merge", "-nomux", *merge_args)
while True:
d.scratchpad_unset("opt.did_something")
d.run_pass("opt_muxtree")
d.run_pass("opt_reduce", *reduce_args)
d.run_pass("opt_merge", *merge_args)
if opt_share:
d.run_pass("opt_share")
if not noff:
d.run_pass("opt_dff", *dff_args)
d.run_pass("opt_clean", *clean_args)
d.run_pass("opt_expr", *expr_args)
if not d.scratchpad_get_bool("opt.did_something"):
break
ys.log_header(d, "Rerunning OPT passes. (Maybe there is more to do…)")

d.optimize()
d.sort()
d.check()


def openlane_synth(
d, top, flatten, report_dir, *, booth=False, abc_dff=False, undriven=True
):
Expand All @@ -71,46 +156,48 @@ def openlane_synth(
d.run_pass("opt_clean") # Clean up after optimization

# Perform various logic optimization passes
d.run_pass("opt", "-nodffe", "-nosdff") # Optimize logic excluding flip-flops
openlane_opt(d, nodffe=True, nosdff=True)
d.run_pass("fsm") # Identify and optimize finite state machines
d.run_pass("opt") # Additional logic optimization
openlane_opt(d)
d.run_pass("wreduce") # Reduce logic using algebraic rewriting
d.run_pass("peepopt") # Perform local peephole optimization
d.run_pass("opt_clean") # Clean up after optimization
if booth:
d.run_pass("booth")
d.run_pass("alumacc") # Optimize arithmetic logic unitsb
d.run_pass("share") # Share logic across the design
d.run_pass("opt") # More logic optimization
openlane_opt(d)

# Memory optimization
d.run_pass("memory", "-nomap") # Analyze memories but don't map them yet
d.run_pass("opt_clean") # Clean up after memory analysis

# Perform more aggressive optimization with faster runtime
# Fast and comprehensive optimization
if undriven:
d.run_pass("opt", "-fast", "-full")
else:
d.run_pass("opt", "-fast", "-mux_undef", "-mux_bool", "-fine")
openlane_opt(
d,
fast=True,
opt_share=True, # affects opt_share
mux_undef=True, # affects opt_expr
mux_bool=True, # affects opt_expr
undriven=undriven, # affects opt_expr
fine=True, # affects opt_expr, opt_reduce
)

# Technology mapping
d.run_pass("memory_map") # Map memories to standard cells
d.run_pass("opt_muxtree")
d.run_pass("opt_reduce", "-fine", "-full")
d.run_pass("opt_merge", "-share_all")
d.run_pass("opt_share")
d.run_pass("opt_dff")
d.run_pass("opt_clean")
if undriven:
d.run_pass("opt", "-fast", "-full")
else:
d.run_pass(
"opt_expr", "-mux_undef", "-mux_bool", "-fine"
) # More optimization after memory mapping
d.run_pass("techmap") # Map logic to standard cells from the technology library
d.run_pass("opt", "-fast") # Fast optimization after technology mapping
d.run_pass("opt", "-fast") # More fast optimization
openlane_opt(
d,
opt_share=True, # affects opt_share
mux_undef=True, # affects opt_expr
mux_bool=True, # affects opt_expr
undriven=undriven, # affects opt_expr
fine=True, # affects opt_expr, opt_reduce
)
d.run_pass("techmap")

# Couple more fast opt iterations
openlane_opt(d, fast=True)
openlane_opt(d, fast=True)

d.run_pass(
"abc", "-fast", *(["-dff"] if abc_dff else [])
Expand Down
Loading