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Add check on exec_ready_i to cv32e40x decode stage #368

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StMiky
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@StMiky StMiky commented Aug 28, 2023

Description

Fix #365 by offloading instructions to a coprocessor only if the execution stage is ready to accept the new instruction. While this is a suboptimal solution, it prevents the ID-EX pipeline register from missing the XIF Issue Interface response from the coprocessor. More details are available in the associated issue.

This change is implemented as a patch to the cv32e40x core, while waiting for a better solution from its developers.

Status

  • Test the proposed solution in NM-Carus

- offload an instruction to the coprocessor only if EX is ready not to miss coprocessor response
@davideschiavone
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@davidmallasen can you review it and see whether this may fix (or partially fix) your issue?

@davidmallasen
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I tested this and it doesn't fix my issue. However, this doesn't seem to conflict with the other patch that we debugged to fix my issue and that I've been using since. This other patch is available here: https://github.com/davidmallasen/x-heep/blob/fix-cv32e40x/hw/vendor/patches/openhwgroup_cv32e40x/0002-Patch-fix-cv32e40x-xif.patch

I see the patch from this PR was included in a previous commit of X-HEEP. Could I create a PR also including my patch since they both seem to work together?

@davideschiavone
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this is already done here: #392

This was referenced Apr 16, 2024
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cv32e40x bug: coprocessor issue information (XIF) not sampled by the CPU
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