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simd: riscv: implement RVV intrinsics #9731

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In RISC-V intrinsics, RVV (RISC-V "Vector") extensions are existing.
In this PR, I experimented to implement RVV extensions and got succeeded to pass internal and runtime tests with turning on this RVV extensions.
This PR uses RVV v0.11 intrinsics.

Some of the RVV extensions are not corresponding one-by-one to NEON or SSE2.
Plus, vuint8m1_t and vuint32m1_t types do not have fixed size.
So, I assumed the fixed lengths for them is 16 like as the result of sizeof(__m128i) or sizeof(uint8x16_t).


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@cosmo0920 cosmo0920 force-pushed the cosmo0920-implement-rvv-intrinsics branch from 6c44d3e to 7528308 Compare December 18, 2024 02:12
@cosmo0920 cosmo0920 force-pushed the cosmo0920-implement-rvv-intrinsics branch from 7528308 to 7c5c3bc Compare December 18, 2024 02:17
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