Fix for EDA-2752 #320
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Fix for EDA-2752 #320
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Before yosys did not infer any display(), but with latest update we can infer $print for display feature of Verilog. As we donot have any model on which $print can be mapped so I removed this cell in synth_rs. Please review the PR. |
BessonThierry
requested changes
Apr 30, 2024
alaindargelas
approved these changes
Apr 30, 2024
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Please consider renaming the function as per @BessonThierry's comment in another PR
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