Merge commit '05ee88915520d1dd82da94a016a9374a1f3a8129' from upstream

Makefile.am

@@ -69,6 +69,7 @@ EXTRA_DIST += \
 	LICENSES/preferred/GFDL-1.2 \
 	LICENSES/preferred/gfdl-1.2.texi.readme \
 	LICENSES/preferred/GPL-2.0 \
+	LICENSES/preferred/LGPL-2.1 \
 	LICENSES/preferred/MIT \
 	LICENSES/stand-alone/GPL-3.0 \
 	tools/logger.pl \

configure.ac

@@ -119,6 +119,7 @@ m4_define([USB1_ADAPTERS],
 	[[stlink], [ST-Link Programmer], [HLADAPTER_STLINK]],
 	[[ti_icdi], [TI ICDI JTAG Programmer], [HLADAPTER_ICDI]],
 	[[ulink], [Keil ULINK JTAG Programmer], [ULINK]],
+	[[angie], [ANGIE Adapter], [ANGIE]],
 	[[usb_blaster_2], [Altera USB-Blaster II Compatible], [USB_BLASTER_2]],
 	[[ft232r], [Bitbang mode of FT232R based devices], [FT232R]],
 	[[vsllink], [Versaloon-Link JTAG Programmer], [VSLLINK]],

contrib/60-openocd.rules

@@ -99,6 +99,8 @@ ATTRS{idVendor}=="0483", ATTRS{idProduct}=="374e", MODE="660", GROUP="plugdev",
 ATTRS{idVendor}=="0483", ATTRS{idProduct}=="374f", MODE="660", GROUP="plugdev", TAG+="uaccess"
 ATTRS{idVendor}=="0483", ATTRS{idProduct}=="3753", MODE="660", GROUP="plugdev", TAG+="uaccess"
 ATTRS{idVendor}=="0483", ATTRS{idProduct}=="3754", MODE="660", GROUP="plugdev", TAG+="uaccess"
+ATTRS{idVendor}=="0483", ATTRS{idProduct}=="3755", MODE="660", GROUP="plugdev", TAG+="uaccess"
+ATTRS{idVendor}=="0483", ATTRS{idProduct}=="3757", MODE="660", GROUP="plugdev", TAG+="uaccess"
 
 # Cypress SuperSpeed Explorer Kit
 ATTRS{idVendor}=="04b4", ATTRS{idProduct}=="0007", MODE="660", GROUP="plugdev", TAG+="uaccess"
@@ -222,6 +224,10 @@ ATTRS{idVendor}=="2aec", ATTRS{idProduct}=="1106", MODE="660", GROUP="plugdev",
 ATTRS{idVendor}=="303a", ATTRS{idProduct}=="1001", MODE="660", GROUP="plugdev", TAG+="uaccess"
 ATTRS{idVendor}=="303a", ATTRS{idProduct}=="1002", MODE="660", GROUP="plugdev", TAG+="uaccess"
 
+# ANGIE USB-JTAG Adapter
+ATTRS{idVendor}=="584e", ATTRS{idProduct}=="424e", MODE="660", GROUP="plugdev", TAG+="uaccess"
+ATTRS{idVendor}=="584e", ATTRS{idProduct}=="4a55", MODE="660", GROUP="plugdev", TAG+="uaccess"
+
 # Marvell Sheevaplug
 ATTRS{idVendor}=="9e88", ATTRS{idProduct}=="9e8f", MODE="660", GROUP="plugdev", TAG+="uaccess"
 

contrib/firmware/angie/c/Makefile

@@ -0,0 +1,75 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+#****************************************************************************
+#   File : Makefile                                                         *
+#   Contents : Code for NanoXplore USB-JTAG ANGIE adapter hardware.         *
+#   Based on openULINK project by: Martin Schmoelzer.                       *
+#   Copyright 2023, Ahmed Errached BOUDJELIDA, NanoXplore SAS.              *
+#   <[email protected]>                                            *
+#	<[email protected]>											*
+# ***************************************************************************/
+
+# Define the name of tools.
+PREFIX =
+
+# Small Device C Compiler: http://sdcc.sourceforge.net/
+CC = $(PREFIX)sdcc
+
+# 8051 assembler, part of the SDCC software package.
+AS = $(PREFIX)sdas8051
+
+# SDCC produces quite messy Intel HEX files. This tool is be used to re-format
+# those files. It is not required for the firmware download functionality in
+# the OpenOCD driver, but the resulting file is smaller.
+PACKIHX = $(PREFIX)packihx
+
+# GNU binutils size. Used to print the size of the IHX file generated by SDCC.
+SIZE = size
+
+# Source and header directories.
+SRC_DIR     = src
+INCLUDE_DIR = include
+
+CODE_SIZE = 0x3C00
+XRAM_LOC  = 0x3C00
+XRAM_SIZE = 0x0400
+
+CFLAGS  = --std-sdcc99 --opt-code-size --model-small
+LDFLAGS = --code-loc 0x0000 --code-size $(CODE_SIZE) --xram-loc $(XRAM_LOC) \
+          --xram-size $(XRAM_SIZE) --iram-size 256 --model-small
+
+# list of base object files
+OBJECTS = main.rel usb.rel protocol.rel jtag.rel delay.rel USBJmpTb.rel serial.rel gpif.rel
+HEADERS = $(INCLUDE_DIR)/usb.h          \
+          $(INCLUDE_DIR)/protocol.h     \
+          $(INCLUDE_DIR)/jtag.h         \
+          $(INCLUDE_DIR)/delay.h        \
+          $(INCLUDE_DIR)/reg_ezusb.h    \
+          $(INCLUDE_DIR)/io.h           \
+          $(INCLUDE_DIR)/serial.h       \
+          $(INCLUDE_DIR)/fx2macros.h    \
+          $(INCLUDE_DIR)/msgtypes.h
+
+# Disable all built-in rules.
+.SUFFIXES:
+
+# Targets which are executed even when identically named file is present.
+.PHONY: all, clean
+
+all: angie_firmware.ihx
+	$(SIZE) angie_firmware.ihx
+
+angie_firmware.ihx: $(OBJECTS)
+	$(CC) -mmcs51 $(LDFLAGS) -o $@ $^
+
+# Rebuild every C module (there are only 5 of them) if any header changes.
+%.rel: $(SRC_DIR)/%.c $(HEADERS)
+	$(CC) -c $(CFLAGS) -mmcs51 -I$(INCLUDE_DIR) -o $@ $<
+
+%.rel: $(SRC_DIR)/%.a51
+	$(AS) -lsgo $@ $<
+
+clean:
+	rm -f *.asm *.lst *.rel *.rst *.sym *.ihx *.lk *.map *.mem
+
+bin: angie_firmware.ihx
+	makebin -p angie_firmware.ihx angie_firmware.bin

contrib/firmware/angie/c/README

@@ -0,0 +1,37 @@
+#SPDX-License-Identifier: GPL-2.0-or-later
+
+This is the ANGIE firmware for ANGIE USB-JTAG adapter.
+
+The main components of ANGIE adapter are:
+- Cypress EZ-USB FX2 microcontroller
+- Spartan-6 FPGA
+- SRAM memory chip
+- Pin headers for various JTAG pin assignments
+
+To compile the firmware, the SDCC compiler package is required. Most Linux
+distributions include SDCC in their official package repositories. The SDCC
+source code can be found at http://sdcc.sourceforge.net/
+
+Simply type "make hex" in the ANGIE directory to compile the firmware.
+"make clean" will remove all generated files except the Intel HEX file
+required for downloading the firmware to ANGIE.
+
+Note that the EZ-USB FX2 microcontroller does not have on-chip flash,
+ANGIE include on-board EEPROM memory to store the firmware program of
+the FX2, but we are not going to use this method.
+
+Instead, upon initial connection of the ANGIE adapter to the host PC
+via USB, the EZ-USB FX2 core has enough intelligence to act as a
+stand-alone USB device, responding to USB control requests and allowing
+firmware download via a special VENDOR-type control request. Then, the
+EZ-USB microcontroller simulates a disconnect and re-connect to the USB bus.
+It may take up to two seconds for the host to recognize the newly connected
+device before OpenOCD can proceed to execute JTAG commands. This delay is
+only visible when OpenOCD first uses a blank (unconfigured) ANGIE device.
+
+Once the firmware downloaded, the FX2 microcontroller activate its GPIF mode,
+download the Spartan-6 FPGA's bitstream, program the FPGA rapidly, and switch
+back to default io mode.
+
+Once the user disconnects the ANGIE adapter, all its memory contents are lost
+and the firmware & bitstream download process has to be executed again.

contrib/firmware/angie/c/include/delay.h

@@ -0,0 +1,50 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+/****************************************************************
+    File : delay.h                                              *
+    Contents : Delays handling header file for NanoXplore       *
+    USB-JTAG ANGIE adapter hardware.                            *
+    Based on openULINK project code by: Martin Schmoelzer.      *
+    Copyright 2023, Ahmed Errached BOUDJELIDA, NanoXplore SAS.  *
+    <[email protected]>                                *
+    <[email protected]>                               *
+*****************************************************************/
+
+#ifndef __DELAY_H
+#define __DELAY_H
+
+#include <stdint.h>
+
+void syncdelay(uint8_t count);
+void delay_5us(void);
+void delay_1ms(void);
+void delay_us(uint16_t delay);
+void delay_ms(uint16_t delay);
+
+#ifndef _IFREQ
+#define _IFREQ 48000   /* IFCLK frequency in kHz */
+#endif
+
+/* CFREQ can be any one of: 48000, 24000, or 12000 */
+#ifndef _CFREQ
+#define _CFREQ 48000   /* CLKOUT frequency in kHz */
+#endif
+
+#if (_IFREQ < 5000)
+#error "_IFREQ too small!  Valid Range: 5000 to 48000..."
+#endif
+
+#if (_IFREQ > 48000)
+#error "_IFREQ too large!  Valid Range: 5000 to 48000..."
+#endif
+
+#if (_CFREQ != 48000)
+#if (_CFREQ != 24000)
+#if (_CFREQ != 12000)
+#error "_CFREQ invalid!  Valid values: 48000, 24000, 12000..."
+#endif
+#endif
+#endif
+
+/* Synchronization Delay formula: see TRM section 15-14 */
+#define _SCYCL (3 * (_CFREQ) + 5 * (_IFREQ) - 1) / (2 * (_IFREQ))
+#endif

contrib/firmware/angie/c/include/fx2macros.h

@@ -0,0 +1,31 @@
+/* SPDX-License-Identifier: LGPL-2.1-or-later */
+
+/*
+ * This code was taken from the fx2lib project from this link:
+ * https://github.com/djmuhlestein/fx2lib
+ *
+ * Copyright (C) 2009 Ubixum, Inc.
+*/
+
+/*! \file
+ *  Macros for simple common tasks in fx2 firmware.
+ * */
+
+#ifndef FX2MACROS_H
+#define FX2MACROS_H
+
+#include "reg_ezusb.h"
+
+typedef enum {FALSE = 0, TRUE} BOOL_VALS;
+
+/**
+ * \brief Used for getting and setting the CPU clock speed.
+ **/
+typedef enum {CLK_12M = 0, CLK_24M, CLK_48M} CLK_SPD;
+
+/**
+ * \brief Evaluates to a CLK_SPD enum.
+ **/
+#define CPUFREQ (CLK_SPD)((CPUCS & bmclkspd) >> 3)
+
+#endif

contrib/firmware/angie/c/include/io.h

@@ -0,0 +1,65 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+/****************************************************************************
+    File : io.h                                                             *
+    Contents : input/output declaration header file for NanoXplore          *
+    USB-JTAG ANGIE adapter hardware.                                        *
+    Based on openULINK project code by: Martin Schmoelzer.                  *
+    Copyright 2023, Ahmed Errached BOUDJELIDA, NanoXplore SAS.              *
+    <[email protected]>                                            *
+	<[email protected]>											*
+*****************************************************************************/
+
+#ifndef __IO_H
+#define __IO_H
+
+#include "reg_ezusb.h"
+
+/***************************************************************************
+ *  JTAG Signals:                                                          *
+ ***************************************************************************
+ * TMS ....... Test Mode Select                                            *
+ * TCK ....... Test Clock                                                  *
+ * TDI ....... Test Data Input  (from device point of view, not JTAG       *
+ *             adapter point of view!)                                     *
+ * TDO ....... Test Data Output (from device point of view, not JTAG       *
+ *             adapter point of view!)                                     *
+ * TRST ...... Test Reset: Used to reset the TAP Finite State Machine      *
+ *             into the Test Logic Reset state                             *
+ * SRST .....  Chip Reset                                                  *
+ ***************************************************************************/
+
+/* PORT A */
+/* PA0 Not Connected */
+/* PA1 Not Connected */
+#define PIN_RDWR_B        IOA2
+#define PIN_CSI_B         IOA3
+#define PIN_INIT_B        IOA4
+#define PIN_PROGRAM_B     IOA5
+/* PA6 Not Connected */
+/* PA7 Not Connected */
+
+/* PORT B */
+#define PIN_TRST      IOB0
+#define PIN_TMS       IOB1
+#define PIN_TCK       IOB2
+#define PIN_TDI       IOB3
+#define PIN_TDO       IOB4
+#define PIN_SRST      IOB5
+/* PA6 Not Connected */
+/* PA7 Not Connected */
+
+/* JTAG Signals with direction 'OUT' on port B */
+/* PIN_TDI - PIN_TCK - PIN_TMS - PIN_TRST - PIN_SRST */
+#define MASK_PORTB_DIRECTION_OUT (bmbit0 | bmbit1 | bmbit2 | bmbit3 | bmbit5)
+
+/* PORT C */ // Debug:
+#define PIN_T0      IOC0
+#define PIN_T1      IOC1
+#define PIN_T2      IOC2
+#define PIN_T3      IOC3
+#define PIN_T4      IOC4
+/* PC5 Not Connected */
+/* PC6 Not Connected */
+/* PC7 Not Connected */
+
+#endif

contrib/firmware/angie/c/include/jtag.h

@@ -0,0 +1,31 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+/****************************************************************************
+	File : jtag.h															*
+	Contents : Jtag handling functions header file for NanoXplore			*
+	USB-JTAG ANGIE adapter hardware.										*
+	Based on openULINK project code by: Martin Schmoelzer.					*
+	Copyright 2023, Ahmed Errached BOUDJELIDA, NanoXplore SAS.				*
+	<[email protected]>											*
+	<[email protected]>											*
+*****************************************************************************/
+
+#ifndef __JTAG_H
+#define __JTAG_H
+
+#include <stdint.h>
+
+uint16_t jtag_get_signals(void);
+void jtag_configure_tck_delay(uint8_t scan_in, uint8_t scan_out,
+	uint8_t scan_io, uint8_t tck, uint8_t tms);
+void jtag_clock_tms(uint8_t count, uint8_t sequence);
+void jtag_slow_clock_tms(uint8_t count, uint8_t sequence);
+void jtag_set_signals(uint8_t low, uint8_t high);
+void jtag_clock_tck(uint16_t count);
+void jtag_slow_clock_tck(uint16_t count);
+void jtag_scan_in(uint8_t out_offset, uint8_t in_offset);
+void jtag_scan_out(uint8_t out_offset);
+void jtag_scan_io(uint8_t out_offset, uint8_t in_offset);
+void jtag_slow_scan_in(uint8_t out_offset, uint8_t in_offset);
+void jtag_slow_scan_out(uint8_t out_offset);
+void jtag_slow_scan_io(uint8_t out_offset, uint8_t in_offset);
+#endif