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local/global clarification #436

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2 changes: 1 addition & 1 deletion src/insns/atomic_exceptions.adoc
Original file line number Diff line number Diff line change
Expand Up @@ -8,7 +8,7 @@ If <<c_perm>> is not granted then store the memory tag as zero, and load `cd.tag
+
If the authorizing capability does not grant <<lm_perm>>, and the tag of `cd` is 1 and `cd` is not sealed, then an implicit <<ACPERM>> clearing <<w_perm>> and <<lm_perm>> is performed to obtain the intermediate permissions on `cd` (see <<LC>>).
+
If the authorizing capability does not grant <<el_perm>>, and the tag of `cd` is 1, then an implicit <<ACPERM>> clearing <<el_perm>> and restricting <<section_cap_level>> to the level of the authorizing capability is performed to obtain the final permissions on `cd` (see <<LC>>).
If the authorizing capability does not grant <<el_perm>>, the authorizing <<section_cap_level>> is _local_ and the tag of `cd` is 1, then an implicit <<ACPERM>> clearing <<el_perm>> and restricting the <<section_cap_level>> to the level of the authorizing capability is performed to obtain the final permissions on `cd` (see <<LC>>).
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+
endif::[]
ifndef::cap_atomic[]
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2 changes: 1 addition & 1 deletion src/insns/load_tag_perms.adoc
Original file line number Diff line number Diff line change
Expand Up @@ -4,7 +4,7 @@ The tag value written to `cd` is 0 if the tag of the memory location loaded is
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If the authorizing capability does not grant <<lm_perm>>, and the tag of `cd` is 1 and `cd` is not sealed, then an implicit <<ACPERM>> clearing <<w_perm>> and <<lm_perm>> is performed to obtain the intermediate permissions on `cd`.
+
If the authorizing capability does not grant <<el_perm>>, and the tag of `cd` is 1, then an implicit <<ACPERM>> clearing <<el_perm>> and restricting <<section_cap_level>> to the level of the authorizing capability is performed to obtain the final permissions on `cd`.
If the authorizing capability does not grant <<el_perm>>, the authorizing <<section_cap_level>> is _local_ and the tag of `cd` is 1, then an implicit <<ACPERM>> clearing <<el_perm>> and restricting the <<section_cap_level>> to the level of the authorizing capability is performed to obtain the final permissions on `cd`.

NOTE: Missing <<lm_perm>> does not affect untagged values since this could result in surprising bit patterns when copying non-capability data.
Similarly, sealed capabilities are not modified as they are not directly dereferenceable.
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2 changes: 1 addition & 1 deletion src/insns/store_tag_perms.adoc
Original file line number Diff line number Diff line change
Expand Up @@ -2,4 +2,4 @@ Tag of the written capability value::

The capability written to memory has the tag set to 0 if the tag of `cs2` is 0 or if the authorizing capability (<<ddc>> or `cs1`) does not grant <<c_perm>>.
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The stored tag is also set to zero if the authorizing capability does not have <<sl_perm>> set but the stored data has a <<section_cap_level>> of 0.
The stored tag is also set to zero if the authorizing capability does not have <<sl_perm>> set but the stored data has a <<section_cap_level>> of 0 (_local_).
6 changes: 4 additions & 2 deletions src/level-ext.adoc
Original file line number Diff line number Diff line change
Expand Up @@ -24,7 +24,7 @@ NOTE: The <<cap_encoding_xlen64,`MXLEN=64` capability encoding>> diagram shows t
NOTE: {cheri_levels_ext_name} requires that LVLBITS&#8805;1 although LVLBITS>1 is considered an experimental enhancement of this extension.
See <<section_ext_cheri_multiple_levels>> for the mechanics when LVLBITS>1.

[#section_cap_level,reftext="capability level"]
[#section_cap_level,reftext="Capability Level (CL)"]
==== Capability Level (CL)

The Capability Level (CL) is a new field added to the capability encoding, as shown in xref:section_cap_encoding[xrefstyle=short].
Expand Down Expand Up @@ -74,7 +74,7 @@ endif::[]
11+| bit[0] - <<m_bit>> ({CAP_MODE_VALUE}-{cheri_cap_mode_name}, {INT_MODE_VALUE}-{cheri_int_mode_name})
|Bits[4:3]| R | W | C | LM | EL | SL | X | ASR | Mode^1^ |
| 0-1 | ✔ | ✔ | ✔ | ✔ | ✔ | ∞ | ✔ | ✔ | Mode^1^ | Execute + ASR (see <<infinite-cap>>)
| 2-3 | ✔ | | ✔ | ✔ | ✔ | | ✔ | | Mode^1^ | Execute + Data & Cap RO
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| 2-3 | ✔ | | ✔ | ✔ | ✔ | N/A | ✔ | | Mode^1^ | Execute + Data & Cap RO
| 4-5 | ✔ | ✔ | ✔ | ✔ | ✔ | ∞ | ✔ | | Mode^1^ | Execute + Data & Cap RW
| 6-7 | ✔ | ✔ | | | | N/A | ✔ | | Mode^1^ | Execute + Data RW
11+| *Quadrant 2: Restricted capability data read/write*
Expand Down Expand Up @@ -108,6 +108,8 @@ This avoids the need for a dedicated instruction and allows reducing the level a
[#section_cap_level_summary]
=== Capability level summary table

NOTE: A capability with <<section_cap_level,CL>>=1 is _global_ and with <<section_cap_level,CL>>=0 is _local_.

.{cheri_levels_ext_name} `LVLBITS=1` summary table for stored capabilities
[#cap_level_store_summary,width="100%",options=header,halign=center,cols="1,1,1,1,5"]
|==============================================================================
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