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Adding missing wb signals to dut of rmap tc's
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stdefeber committed Aug 14, 2024
1 parent db5a273 commit e4d3e26
Showing 1 changed file with 33 additions and 0 deletions.
33 changes: 33 additions & 0 deletions tests/hdl/test_rmap/dut.svh
Original file line number Diff line number Diff line change
Expand Up @@ -199,6 +199,39 @@ apb #(
.pclk (clk),
.presetn (~rst)
);
`elsif INTERFACE_WB
wb2lb dut (
.clk (clk ),
.rst (reset ),
// Wishbone
.wb_adr_i (mst.wb_adr_i),
.wb_dat_i (mst.wb_dat_i),
.wb_we_i (mst.wb_we_i ),
.wb_stb_i (mst.wb_stb_i),
.wb_cyc_i (mst.wb_cyc_i),
.wb_sel_i (mst.wb_sel_i),
.wb_dat_o (mst.wb_dat_o),
.wb_ack_o (mst.wb_ack_o),
// Local Bus
.wready (wready ),
.waddr (waddr ),
.wdata (wdata ),
.wen (wen ),
.wstrb (wstrb ),
.rdata (rdata ),
.rvalid (rvalid ),
.raddr (raddr ),
.ren (ren )
);
// Wishbone master
wb #(
.ADDR_W(ADDR_W),
.DATA_W(DATA_W),
.STRB_W(STRB_W)
) mst (
.clk(clk),
.reset(reset)
);
`elsif INTERFACE_AMM
// Avalon-MM
.address (mst.address),
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