Board: amd : add board support for the Audio DSP on ACP_6_0 soc.

Create a acp_6_0_adsp board support for
the Audio DSP on ACP soc.

Signed-off-by: DineshKumar Kalva <[email protected]>

boards/amd/acp_6_0_adsp/Kconfig.acp_6_0_adsp

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+# Copyright (c) 2024 AMD
+# SPDX-License-Identifier: Apache-2.0
+
+config BOARD_ACP_6_0_ADSP
+select SOC_ACP_6_0

boards/amd/acp_6_0_adsp/acp_6_0_acp_adsp.dts

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+/*
+ * Copyright (c) 2024 AMD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+/dts-v1/;
+
+#include <amd/acp_6_0.dtsi>
+
+/ {
+	model = "AMD ACP_6_0  Audio DSP";
+	compatible = "acp_6_0";
+};

boards/amd/acp_6_0_adsp/acp_6_0_adsp_defconfig

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+# SPDX-License-Identifier: Apache-2.0
+
+CONFIG_GEN_ISR_TABLES=y
+CONFIG_GEN_IRQ_VECTOR_TABLE=y
+CONFIG_XTENSA_RESET_VECTOR=y
+CONFIG_OUTPUT_SYMBOLS=y
+CONFIG_MULTI_LEVEL_INTERRUPTS=n
+CONFIG_2ND_LEVEL_INTERRUPTS=n
+CONFIG_BUILD_OUTPUT_BIN=n
+CONFIG_CLEANUP_INTERMEDIATE_FILES=y
+CONFIG_DCACHE_LINE_SIZE_DETECT=n
+CONFIG_DCACHE_LINE_SIZE=128

boards/amd/acp_6_0_adsp/board.cmake

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+# SPDX-License-Identifier: Apache-2.0
+board_set_flasher_ifnset(misc-flasher)
+board_finalize_runner_args(misc-flasher)
+board_set_rimage_target(rmb)

boards/amd/acp_6_0_adsp/board.yml

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+board:
+  name: acp_6_0_adsp
+  full_name: ACP 6.0 Xtensa Audio DSP
+  vendor: amd
+  socs:
+    - name: acp_6_0

boards/amd/acp_6_0_adsp/doc/index.rst

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+.. zephyr:board:: acp_6_0_adsp
+
+Overview
+********
+
+ACP 6.0 Audio DSP board is based on AMD ACP 6.0 Xtensa Architecture DSP,
+Zephyr OS is ported to run on the HiFi5 DSP.
+
+Hardware
+********
+
+- Board features:
+
+  - RAM & Storage: 1.75 MB HP SRAM / 512 KB IRAM/DRAM
+  - Audio Interfaces:
+
+      - 1 x SP (I2S, PCM),
+      - 1 x BT (I2S, PCM),
+      - 1 x HS(I2S, PCM),
+      - DMIC
+
+System requirements
+*******************
+
+Xtensa Toolchain
+----------------
+
+The Zephyr SDK provides GCC-based toolchains necessary to build Zephyr for
+the AMD boards. For users looking for higher optimization levels, building with
+the proprietary Xtensa toolchain from Cadence might be preferable.
+
+The following instructions assume you have purchased and
+installed the toolchain(s) and core(s) for your board following their
+instructions.
+
+If you choose to build with the Xtensa toolchain instead of the Zephyr SDK, set
+the following environment variables specific to the board in addition to the
+Xtensa toolchain environment variable listed in XTENSA_TOOLS_DIR and XTENSA_BUILDS_DIR.
+
+First, make sure to set the ``$HOME/.flexlmrc`` file or
+``XTENSAD_LICENSE_FILE`` variable as instructed by Cadence.
+Next, set the following environment variables:
+
+.. code-block:: shell
+
+   export XTENSA_TOOLCHAIN_PATH=$HOME/xtensa/XtDevTools/install/tools
+   export XTENSA_BUILDS_DIR=$XTENSA_TOOLCHAIN_PATH/../builds
+   export ZEPHYR_TOOLCHAIN_VARIANT=xcc
+   export TOOLCHAIN_VER=RI-2019.1-linux
+   export XTENSA_CORE=LX7_HiFi5_PROD
+
+The bottom three variables are specific to acp_6_0.
+
+Signing
+-------
+
+``west build`` tries to sign the binary at the end of the build. If you need
+to sign the binary yourself, you can invoke ``west sign`` directly. Read the
+``west`` logs to find the ``west sign`` invocation; you can copy and modify
+the command logged for your own purposes. Run ``west sign -h`` for more
+details.
+
+The build tries to provide as many default rimage parameters are possible. If
+needed, there are several ways to override them depending on your specific
+situation and use case. They're often not mutually exclusive but to avoid
+undocumented rimage precedence rules it's best to use only one way at a time.
+
+- For local, interactive use prefer ``rimage.extra-args`` in west config, see
+  ``west sign -h``. The WEST_CONFIG_LOCAL environment variable can point at a
+  different west configuration file if needed.
+
+- You can add or overwrite a ``$platform.toml`` file(s) in your
+  ``rimage/config/`` directory
+
+- For board-specific needs you can define WEST_SIGN_OPTS in
+  ``boards/amd/acp_6_0_adsp/board.cmake``, see example in
+  ``soc/amd/acp_6_0/CMakeLists.txt``
+
+Programming and Debugging
+*************************
+
+Building
+--------
+
+Build as usual.
+
+  scp -r user@username:~/Target_binary_image_path.sh \
+  user@remotehostname:~/targeted_binary_image_path.txt
+  ssh user@remotehostname
+  sudo driver reload
+
+Supported Features
+==================
+
+The following hardware features are supported:
+
++-----------+------------+-------------------------------------+
+| Interface | Controller | Driver/Component                    |
++===========+============+=====================================+
+| I2S       | on-chip    | interrupt controller                |
++-----------+------------+-------------------------------------+
+
+System Clock
+------------
+
+This board configuration uses a system clock frequency of @ 200 - 800MHz.