Vcs support #111
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Vcs support #111
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Legacy VCS support is removed, it was focused around SystemC. SystemC support in VCS is currently removed, and will be added at a later stage
Provided:
* simple_verilog - Simple verilog only testbench for all simulators
* simple_mixed_language - Verilog and VHDL tb for all capable sims
* Remove modelsim and vcs examples
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Added VCS support, that works similar to Xcelium, questa/modelsim