write_verilog: don't emit code with dangling else related to wrong condition #4150
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This was referenced Jan 23, 2024
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I can't reproduce the test failure locally for some reason. That's odd. |
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Oh no |
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In any case I feel like we need some tests here. |
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@whitequark OK with you if I push to your branch? I would rebase (to fix CI), and maybe add some test. |
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Go ahead please. |
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Rebased |
povik
reviewed
Jan 24, 2024
| @@ -1996,36 +1982,52 @@ bool dump_proc_switch_ifelse(std::ostream &f, std::string indent, RTLIL::SwitchR | |||
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| dump_attributes(f, indent, sw->attributes); | |||
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So this is something we were missing before, unrelated to the fix
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We were dumping slightly different attributes (for case rules and not switch itself), the switch is probably better.
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Thanks @povik! |
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It is embarrassing to have written it, but also, three independent reviewers missed it too :D
See amaranth-lang/amaranth#1049.
Issue introduced in #4090