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RMA WG 07 05 2018
spotluri edited this page Jul 5, 2018
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- Memory Model Proposal (Anshuman Goswami)
- Note taker: Jim Dinan (Intel)
- Attendees: Anshuman Goswami and Sreeram Potluri (NVIDIA), Nick Park (DOD), Khaled Hamidouche (AMD), Megan Grodowitz (ARM), Naveen and Bob (Cray), Swaroop Pophale and Manju (ORNL), Min Si (ANL), Michael Raymond (HPE)
- None
- None
- Applied updates suggested in previous meeting, including updates to ordering table
- Q: Why include barrier in the table? Is the inter-PE synchronization relevant here?
- A: Focus is on memory ordering and barrier is another way to achieve the quiet
- Discussion of ordering in OpenSHMEM model
- Discussion of read-after-read ordering
- Motivation to consider additional semantics clarifications: compiler optimizations involving OpenSHMEM operations -- What is allowed by compiler in terms of reordering?
- Q: Is collective ordering a basic property? Current ordering semantics may be more relevant to pSync versus user's data buffers.
- Discussion of reads-from and happens-before
- Are shmem_p and shmem_g atomic compatible operations?
- Is wait_until compatible with put/get operations? Yes, it is.
- Polling using shmem_g instead of wait_until -- what are the implications to the shmem_g routine and SHMEM memory model?
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Working Groups
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Errata