Home

What is the project about ?

This project is part of the Embedded Systems and Software education at Grenoble Institute of Technology, and in cooperation with TIMA laboratory.

The goal is to design and implement a neural network on a FPGA board. The test application of our project will be MNIST digits recognition.

Test application

As mentionned before, we will test our design on MNIST database. It is composed of handwritten digits on 28x28 pixels images and is a reference in machine learning and image processing, with 60,000 images in training set and 10,000 in test set. It is commonly used to train and test in the field of machine learning.

FPGA test board will be a Zedboard, which can contain up to about 200 neurons. Training has been made by an TIMA intervenant.

Project Architecture

Our project is divided in 3 subprojects:

• dauphin, containing all HDL files for our design and implementation on the target board.
• lion, containing monitoring program for our test application on target board.
• moineau is a C reference program to compare our results on FPGA board to validate the design, and compute a FPGA vs CPU speedup.