How to program the board

Launch Vivado 💯

• ssh -X cimepe28 (do next operations on this machine)
• cd Neurons/nn-zybo-for-students/
• source ${HOME}/settings/settings_vivado_2015_2.sh
• make vivado to launch vivado

Inside the beast

• click on "Run Synthesis" to generate the netlist
• click on "Run Implementation" to place and route
• click on "Generate Bitstream" to generate the programming file

Launch the SDK

• click on "File" -> "Export" -> "Export Hardware"
• check the box "Include bitstream"
• click on "File" -> "Launch SDK" to launch the SDK and click "OK"
• hw_server -s tcp::3121 in a new local terminal to launch the hardware server

Program the FPGA and launch main

• picocom -b 115200 /dev/ttyUSBx to open local serial console
• build myapp and myfsbl (click on 🔨 icon)
• connect the Zybo board to QSPI with the jumper
• cd ~/Neurons/nn-zybo-for-students
• make to flash the FPGA with everything
• click on the board button PS-SRST to restart the board

If -lrsa or -lxil error at build

For -lrsa

• cd ~/Neurons/nn-zybo-for-students/vivadoprj/project_2/project_2.sdk/myfsbl_bsp/ps7_cortexa9_0/libsrc/xilrsa_v1_1/src
• cp ~/lib_faults/librsa.a .

For -lxil

• cd ~/Neurons/nn-zybo-for-students/vivadoprj/project_2/project_2.sdk/myapp_bsp
• make
• cd ~/Neurons/nn-zybo-for-students/vivadoprj/project_2/project_2.sdk/myfsbl_bsp
• make

If myapp.elf is missing

• cd ~/Neurons/nn-zybo-for-students/vivadoprj/project_2/project_2.sdk/myapp/Release
• make clean and make to generate myapp.elf