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Project related information in bitfiles
Neelakandan Manihatty Bojan edited this page Jun 8, 2014
·
2 revisions
Register 1:
Used to store the epoch time in hexadecimal. We first obtain the epoch time using the 'date +%s' (shown below) and convert this to hex value.
nm525@nf-test111:~$ date +%s
1400850804
Byte Number --> 4 3 2 1
+-----+-----+-----+-----+
| |
| EPOCH LOWER |
| |
+-----+-----+-----+-----+
It is well known that a signed 4-byte integer has a maximum value of 2,147,483,647. So this limits us to year 2038. For more accurate value see below.
nm525@nf-test111:~$ date -d @2147483647
Tue Jan 19 03:14:07 GMT 2038
Register 2:
To address the 2038 issue, we add another register to store the upper 32 bits.
Byte Number --> 4 3 2 1
+-----+-----+-----+-----+
| |
| EPOCH UPPER |
| |
+-----+-----+-----+-----+
Register 3:
Used to store the detail of about the project.
Byte Number --> 4 3 2 1
+-----+-----+-----+-----+
| | |
| PF | RC/PID |
| | |
+-----+-----+-----+-----+
ǀ ǀ
ǀ ǀ
ǀ ------------------------------> RC (1 bit) is used to identify if the project is a reference/contrib project. Remaining 15 bits are used to identify the project.
-------------------------------------> Byte 3 and 4- Can be used to store the project features
ǀ ǀ
ǀ -----------> Byte 3 is used to store the DMA ID.(Encoding pattern is as follows : DMA_V1 OPED (8'd1)/ DMA_V2 MARIO(8'd2)/ DMA_V3 MARCO(8'd3))
ǀ
-------------------> Byte 4 is used to store other features
Bit 0 (LSB) : phy initialization (Encoding pattern is: Initialized by Microblaze(1'b0), requires initialization by driver(1'b1))
Bit 1 : register availablity in pipeline (availablity(1'b1), unavailability(1'b0))
Bit 2 : test suite availablity (availablity(1'b1), unavailability(1'b0))
Bit 3 - Bit 7 : tool flow (ISE(4'd1)/ EDK(4'd2)/ VIVADO(4'd3)/ VIVADO 14.2 (4'd4) etc )
Register 4:
Used to store the release tag of the project.
Byte Number --> 4 3 2 1
+-----+-----+-----+-----+
| | | | |
| RR | RR | RT | RT |
| | | | |
+-----+-----+-----+-----+
ǀ ǀ ǀ ǀ
ǀ ǀ ǀ ------------------------> Byte 1- Used to identify the lower two digits of the release tag
ǀ ǀ ------------------------------> Byte 2- Used to identify if the upper digits of the release tag
ǀ -------------------------------------> Byte 3- Reserved for future use
-------------------------------------------> Byte 4- Reserved for future use
Register 5:
Used to store the board information.
Byte Number --> 4 3 2 1
+-----+-----+-----+-----+
| | | | |
| AN | PCBV| BID | REV |
| | | | |
+-----+-----+-----+-----+
ǀ ǀ ǀ ǀ
ǀ ǀ ǀ ------------------------> Byte 1- Used to identify the Board revision (Revison number of the board can be encoded in binary)
ǀ ǀ ------------------------------> Byte 2- Used to identify the board (Encoding pattern is as follows : NetFPGA-1G (8'd1)/ NetFPGA-10G(8'd2)/ CML(8'd3)/ SUME(8'd4))
ǀ -------------------------------------> Byte 3- PCB version (not known for NetFPGA-10G)
-------------------------------------------> Byte 4- Assembly number (for NetFPGA-10G not know, so currently set to 0)
Register 6 - Register 16:
Byte Number --> 4 3 2 1
+-----+-----+-----+-----+
| | | | |
| RR | RR | RR | RR |
| | | | |
+-----+-----+-----+-----+
ǀ ǀ ǀ ǀ
ǀ ǀ ǀ ------------------------> Byte 1- Reserved for future use
ǀ ǀ ------------------------------> Byte 2- Reserved for future use
ǀ -------------------------------------> Byte 3- Reserved for future use
-------------------------------------------> Byte 4- Reserved for future use