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AD7768‐1 Platform Build HDL
This section describes how to download the HDL design from the github repository. The designs can be built by using make in a shell. The following steps describe how to do this which conclude by calling a makefile with the make command.
This will build the Platform Designer™ (formerly called QSys™) and Quartus® projects, and then generate and compile them. This approach guarantees quality of results for anyone initially working with these designs.
Create a directory where all the project repositories can be cloned from github.
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Open a shell in the VM player (Ctrl+Alt+T)
$ cd ~ $ mkdir ad7768-1
$ ~/intelFPGA_lite/20.1/nios2eds/nios2_command_shell.sh
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navigate to the directory where the project will be stored
$ cd ad7768-1 $ git clone https://github.com/ArrowElectronics/hdl.git
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then do the following to update the files in the working tree...
$ cd hdl $ git R20.1_TE_DSD_1.0
$ make ad77681evb.tei0022
The build can take a significant period of time to complete. Open and regularly refresh the ad77681evb_tei0022_quartus.log file in a text editor to monitor progress. This is located in the hdl/projects/ad77681evb/tei0022 subdirectory.
Return to Build the Example Design
Return to AD7768-1 Platform User Guide
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